Intel S5500WBR Manual De Usuario
Functional Architecture
Intel® Server Board S5500WB TPS
32
Revision 1.9
Intel order number E53971-008
Two 16C550 compatible serial ports
Serial IRQ support
16 GPIO ports (shared with Integrated BMC)
LPC to SPI Bridge for system BIOS support
SMI and PME support
ACPI compliant
Wake-up control
Serial IRQ support
16 GPIO ports (shared with Integrated BMC)
LPC to SPI Bridge for system BIOS support
SMI and PME support
ACPI compliant
Wake-up control
The Pilot II contains an integrated KVMS subsystem and graphics controller with the
following features:
following features:
USB 2.0 for keyboard, mouse, and storage devices
Hardware Video Compression for text and graphics
Hardware encryption
2D Graphics Acceleration
DDR2 graphics memory interface
Matrox 2000 Graphics core with PCI Express* x1 host interface
Up to 1600x1200 pixel resolution
Hardware Video Compression for text and graphics
Hardware encryption
2D Graphics Acceleration
DDR2 graphics memory interface
Matrox 2000 Graphics core with PCI Express* x1 host interface
Up to 1600x1200 pixel resolution