Intel C2518 FH8065501516710 Hoja De Datos
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FH8065501516710
Volume 2—SoC Reset and Power Supply Sequences—C2000 Product Family
Reset Sequences and Power-Down Sequences
Intel
®
Atom™ Processor C2000 Product Family for Microserver
Datasheet, Vol. 2 of 3
September 2014
136
Order Number: 330061-002US
Notes:
1.
The minimum parameter allows satisfying the 30-µs minimum requirement show in Figure 9: Timing for
Entering and Exiting the Power Down of the Intel Low Pin Count (LPC) Interface Specification, Revision
1.1
.
2.
The SoC can be configured by software to stretch the duration of PMU_SLP_S3_B.
Table 7-3.
S0 State to S5 State Sequence
Sym
Parameter
Min
Max
Units
Note
Fig
t56
PMU_PLTRST_B asserted by SoC after SUS_STAT_B
asserted by SoC
60
-
µs
1
t582
PMU_SLP_DDRVTT_B and PMU_SLP_S3_B asserted
by SoC after PMU_PLTRST_B asserted by SoC
31
-
µs
t61
PMU_SLP_S45_B asserted by SoC after
PMU_SLP_S3_B asserted by SoC
30
-
µs
2
t602
PMU_SLP_S45_B deasserted by SoC after
PMU_SLP_S45_B asserted by SoC.
4
5
sec