Intel C2518 FH8065501516710 Hoja De Datos
Los códigos de productos
FH8065501516710
Intel
®
Atom™ Processor C2000 Product Family for Microserver
September 2014
Datasheet, Vol. 2 of 3
Order Number: 330061-002US
155
Volume 2—Power Management—C2000 Product Family
Internal Power Wells
9.4
Internal Power Wells
The SoC internal circuitry is powered by three power wells:
• Core power well
• SUS power well
• RTC power well
• SUS power well
• RTC power well
9.4.1
Core Power Well
This power group includes all internal voltage rails and associated power wells that are
on only when the system is in the system sleep S0 state (system is fully powered-on).
These voltage rails are turned off when the system transitions to one of the other low-
power system sleep states. See
for the ACPI states flow diagram.
9.4.2
SUS Power Well
This power group includes internal voltage rails and associated power wells that are on
when the system is in the S0 and S5 states. These voltage rails are turned off when the
system transitions from S5 to the G3 (mechanically off) state.
Most of the power management signal pins have their drivers/receivers in the SUS
power well.
9.4.3
RTC Power Well
This power group includes all internal voltage rails and associated power wells that are
always on, even when the system is in the G3 (mechanical off) state. This group is
supplied its 3.3V from the SUS power supply. When the system is in the G3 state, the
RTC power well is powered from an external battery source, typically a 3.0V lithium-
type coin cell.
If a complete power failure (no AC power and no battery back-up supply) occurs, this
voltage rail does not provide any power if there is no functioning battery providing its
power.
Note:
In the G3 state (mechanical off), it is permissible for designs to not have an external
coin-cell battery if the design does not need to preserve information when the system
power is turned off.