Cypress CY7C67300 Manual De Usuario

Document #: 38-08015 Rev. *J

Page 12 of 99

EZ-Host can boot into any one of four modes. The mode it boots
into is determined by the TTL voltage level of GPIO[31:30] at the
time nRESET is deasserted. 

 shows the different boot

pin combinations possible. After a reset pin event occurs, the
BIOS bootup procedure executes for up to 3 ms. GPIO[31:30]
are sampled by the BIOS during bootup only. After bootup these
pins are available to the application as GPIOs. 

Ensure that GPIO[31:30] is pulled high or low as needed using
resistors tied to V

CC

 or GND with resistor values between 5K

ohms and 15K ohms. Do not tie GPIO[31:30] directly to V

CC

 or

GND. Note that in standalone mode, the pull ups on those two
pins are used for the serial I2C EEPROM (if implemented). Make
sure that the resistors used for these pull ups conform to the
serial EEPROM manufacturer's requirements. 

If any mode other then standalone is chosen, EZ-Host is in
coprocessor mode. The device powers up with the appropriate
communication interface enabled according to its boot pins and
waits idle until a coprocessor communicates with it. See the
BIOS documentation for greater detail of the boot process.

The operational modes are discussed in the following sections.

EZ-Host can act as a coprocessor to an external host processor.
In this mode, an external host processor drives EZ-Host and is
the main processor rather then EZ-Host’s own 16-bit internal
CPU. An external host processor may interface to EZ-Host
through one of the following three interfaces in coprocessor
mode:

■

HPI mode, a 16 bit parallel interface with up to 16 MB transfer 
rate

■

HSS mode, a serial interface with up to 2M baud transfer rate

■

SPI mode, a serial interface with up to 2 Mb/s transfer rate

At bootup GPIO[31:30] determine which of these three interfaces
are used for coprocessor mode. See 

 for details.

Bootloading begins from the selected interface after POR + 3 ms
of BIOS bootup.

In standalone mode, there is no external processor connected to
EZ-Host. Instead, EZ-Host’s own internal 16-bit CPU is the main
processor and firmware is typically downloaded from an
EEPROM. Optionally, firmware may also be downloaded via
USB. See 

 for booting into standalone mode.

After booting into standalone mode (GPIO[31:30] = ‘11’), the
following pins are affected:

■

GPIO[31:30] are configured as output pins to examine the 
EEPROM contents

■

GPIO[28:27] are enabled for debug UART mode

■

GPIO[29] is configured for as OTGID for OTG applications on 
PORT1A

❐

If OTGID is logic 1 then PORT1A (OTG) is configured as a 
USB peripheral

❐

If OTGID is logic 0 then PORT1A (OTG) is configured as a 
USB host

■

Ports 1B, 2A, and 2B default as USB peripheral ports

■

All other pins remain INPUT pins.

0

0

Host Port Interface (HPI)

0

1

High-Speed Serial (HSS)

1

0

Serial Peripheral Interface (SPI, 
slave mode)

1

1

I

2

C EEPROM (Standalone Mode)