Hynix HMP125U6EFR8C-S6 Fascicule
Rev. 0.3 / Nov. 2008 13
1
240pin DDR2 SDRAM Unbuffered DIMMs
Differential Input AC logic Level
1. V
IN
(DC) specifies the allowable DC execution of each input of differential pair such as CK, CK, DQS, DQS, LDQS,
LDQS, UDQS and UDQS.
2. V
ID
(DC) specifies the input differential voltage |V
TR
-V
CP
| required for switching, where V
TR
is the true input (such as
CK, DQS, LDQS or UDQS) level and V
CP
is the complementary input (such as CK, DQS, LDQS or UDQS) level. The
minimum value is equal to V
IH
(DC) - V
IL
(DC).
Note:
1. V
ID
(AC) specifies the input differential voltage |V
TR
-V
CP
| required for switching, where V
TR
is the true input signal
(such as CK, DQS, LDQS or UDQS) and V
CP
is the complementary input signal (such as CK, DQS, LDQS or UDQS).
The minimum value is equal to V
IH
(AC) - V
IL
(AC).
2. The typical value of V
IX
(AC) is expected to be about 0.5 * V
DDQ
of the transmitting device and V
IX
(AC) is expected to
track variations in V
DDQ
. V
IX
(AC) indicates the voltage at which differential input signals must cross.
DIFFERENTIAL AC OUTPUT PARAMETERS
Note:
1. The typical value of V
OX
(AC) is expected to be about 0.5 * V
DDQ
of the transmitting device and V
OX
(AC) is expected to
track variations in V
DDQ
. V
OX
(AC) indicates the voltage at which differential output signals must cross.
Symbol
Parameter
Min.
Max.
Units
Note
V
ID
(ac)
ac differential input voltage
0.5
V
DDQ
+ 0.6
V
1
V
IX
(ac)
ac differential cross point voltage
0.5 * V
DDQ
- 0.175
0.5 * V
DDQ
+ 0.175
V
2
Symbol
Parameter
Min.
Max.
Units
Note
V
OX
(ac)
ac differential cross point voltage
0.5 * V
DDQ
- 0.125
0.5 * V
DDQ
+ 0.125
V
1
V
DDQ
Crossing point
V
SSQ
V
TR
V
CP
V
ID
V
IX or
V
OX
< Differential signal levels >