SMC Networks LH79520 SoC ARM720T Manuel D’Utilisation

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ARM720T_LH79520 – Sharp LH79520 SoC with ARM720T 32-bit RISC Processor 
Name Type 
Polarity/Bus 
size
Description 
PER_RESET 
I Low 
Reset signal from the LH79520. 
ARM7_SYS_RESE
O Low 
Reset signal to the LH79520 (internally connected from the RST_I 
line). 
PER_CLK 
I Rise 
Clock signal from the LH79520 
ARM7_SYS_CLK 
O Rise 
External Clock signal to the LH79520 (internally connected from the 
CLK_I line). 
PER_READY 
O Low 
Static Memory Controller External Wait Control 
PER_INT 
O 5/High 
External Interrupt lines. These lines appear as interrupts 0 to 4 when 
handled by the physical device's Vectored Interrupt Controller (see 
Configuring the Processor 
The architecture of the ARM720T_LH79520 can be configured after placement on the schematic sheet, or OpenBus System 
document, using the Configure (32-bit Processors) dialog (Figure 2). Access to this dialog depends on the document in which 
you are working: 
•  In the Schematic document – simply right-click over the device and choose the command to configure the processor from 
the context menu that appears. Alternatively, click on the Configure button, available in the Component Properties dialog for 
the device. 
•  In the OpenBus System document – access the dialog by right-clicking over the component and choosing the command to 
configure the processor from the menu that appears. Alternatively, double-click on the component to access the dialog 
directly. 
 
Figure 2. Options to configure the architecture of the ARM720T_LH79520. 
The drop-down field at the top-right of the dialog enables you to choose the type of processor you want to work with. As the 
pinouts for the Wishbone interfaces between the 32-bit processors are the same, you can easily change the processor used in 
your design without having to extensively rewire the external interfaces. 
As you select the processor type, the Configure (32-bit Processors) dialog will change accordingly to reflect the architectural 
options available. The symbol on the schematic will also change to reflect the type of processor and configuration options 
chosen. 
For the ARM720T_LH79520, a single architectural option is available that allows you to define the size of the internal memory 
for the processor. This memory, also referred to as ‘Low’ or ‘Boot’ memory is implemented using true dual port FPGA Block 
RAM and will contain the boot part of a software application and the interrupt and exception handlers. 
CR0162 (v2.0) March 10, 2008