Emerson PMT1 Manuel D’Utilisation
Serial I/O:
MPC860P Serial Interface
10002367-02
PmT1 and PmE1 User’s Manual
5-5
Serial Communication Controllers (SCC)
The MPC860P has four SCCs which may be configured independently to implement differ-
ent protocols. Protocols such as UART, HDLC, and SS7 are supported to varying degrees in
the MPC860P.
ent protocols. Protocols such as UART, HDLC, and SS7 are supported to varying degrees in
the MPC860P.
The choice of protocol is independent of the choice of physical interface. The SCCs do not
implement the physical interface. They are connected to the outside world via the serial
interface (SI). The SI can route the SCC/SMC outputs directly to the MPC860P external pins,
or it can multiplex any combination of SCCs and SMCs together on one or two TDM chan-
nels using the time slot assigner.
implement the physical interface. They are connected to the outside world via the serial
interface (SI). The SI can route the SCC/SMC outputs directly to the MPC860P external pins,
or it can multiplex any combination of SCCs and SMCs together on one or two TDM chan-
nels using the time slot assigner.
Each of the internal clocks (RCLK, TCLK) for each SCC can be driven by one of four baud rate
generators or one of four external clock pins. These clocks have a top rate of one half of the
system clock (20 MHz at 40 MHz).
generators or one of four external clock pins. These clocks have a top rate of one half of the
system clock (20 MHz at 40 MHz).
Serial Management Controllers (SMC)
The MPC860P contains two SMCs configured as UART ports. SMC1 is assigned as the DCE
console port A, and SMC2 is assigned as the DCE download port B. The SMC physical inter-
face is implemented via the serial interface and time slot assigner, and may also be con-
nected to a TDM channel. The clock is driven by either one of four baud rate generators or
from an external clock pin.
console port A, and SMC2 is assigned as the DCE download port B. The SMC physical inter-
face is implemented via the serial interface and time slot assigner, and may also be con-
nected to a TDM channel. The clock is driven by either one of four baud rate generators or
from an external clock pin.
Time Slot Assigner (TSA)
The TSA allows any combination of SCCs and SMCs to multiplex their data together on
either one or two time-division multiplexed (TDM) channels. A TDM is defined as a serial
channel which is divided into channels separated by time. Common examples of TDM chan-
nels are T1/E1, CEPT, PCM Highway, ISDN Primary Rate, and ISDN Basic Rate (IDL and GCI).
You may define your own interface as well.
either one or two time-division multiplexed (TDM) channels. A TDM is defined as a serial
channel which is divided into channels separated by time. Common examples of TDM chan-
nels are T1/E1, CEPT, PCM Highway, ISDN Primary Rate, and ISDN Basic Rate (IDL and GCI).
You may define your own interface as well.
The serial interface with TSA implements both the internal route selection and, if necessary,
time division multiplexing for multiplexed serial channels. The TSA is completely indepen-
dent of the protocol used by the SCCs and SMCs. The purpose of the TSA is to route data
from the specified pins to the desired SCC or SMC at the correct time. The SCCs and SMCs
then handle the data they receive.
time division multiplexing for multiplexed serial channels. The TSA is completely indepen-
dent of the protocol used by the SCCs and SMCs. The purpose of the TSA is to route data
from the specified pins to the desired SCC or SMC at the correct time. The SCCs and SMCs
then handle the data they receive.
The TSA also supports:
• 1 or 2 clocks per data bit
• programmable delay (0-3 bits) between frame sync and frame start
• four programmable strobe outputs
• two clock output pins