ASUS RS500A-E6/PS4 Manuel D’Utilisation
第五章：BIOS 程式設定
5-16
5.4.2 晶片設定（Chipset Configuration）
本選單可讓您變更晶片組的進階設定，請選擇所需設定的項目並按一下
<Enter> 鍵以顯示子選單項目。
北橋晶片設定（NorthBridge Configuration）
v02.61 (C)Copyright 1985-2010, American Megatrends, Inc.
BIOS SETUP UTILITY
Advanced
Advanced Chipset Settings
NorthBridge Configuration
SouthBridge Configuration
SR5650 Configuration
←→
Select Screen
↑↓
Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit
Options for NB
v02.61 (C)Copyright 1985-2010, American Megatrends, Inc.
BIOS SETUP UTILITY
Advanced
NorthBrideg Chipset Configuration
Memory Configuration
ECC Configuration
DRAM Timing Configuration
Memroy Timing Parameters
[CPU Node 0]
Memory CLK
:533 MHz, N/A
CAS Latency(Tcl)
:7 CLK , N/A
RAS/CAS Delay(Trcd)
:7 CLK , N/A
Row Precharge Time(Trp):7 CLK , N/A
Min Active RAS(Tras) :20 CLK, N/A
RAS/RAS Delay(Trrd)
:4 CLK, N/A
Row Cycle (Trc)
:27 CLK, N/A
Read to Precharge(Trtp):4 CLK, N/A
Write Recover Time(Twr): 8 CLK, N/A
←→
Select Screen
↑↓
Select Item
Enter Go to Sub Screen
F1 General Help
F10 Save and Exit
ESC Exit