Epson arm.powered arm720t Manuel D’Utilisation

To determine whether entry to debug state was due to a breakpoint, watchpoint, or debug 

request (DBGRQ), bit 33 (DBGBREAK) of scan chain 1 must be consulted together with bit 12 

(DBGMOE) of the debug status register (register 1 of scan chain 2). 
Table 9-7 on page 9-32 shows how DBGMOE and DBGBREAK vary according to the reason 

for entry to debug state.

DBGMOE and DBGBREAK must be read after entry into debug state and before 

any other accesses to scan chain 1.

The calculation of the branch return address is as follows:

•

for normal breakpoint and watchpoint, the branch is:
- (4 + N + 3S)

•

for entry through debug request (DBGRQ) or watchpoint with exception, the 

branch is:
- (3 + N + 3S)

where N is the number of debug speed instructions executed (including the final branch) and 

S is the number of system speed instructions executed.

When a breakpoint, or a debug request occurs, the normal flow of the program is interrupted. 

Therefore, debug can be treated as another type of exception. The interaction of the debugger 

with other exceptions is described in 

section covers the following priorities:

•

•

•

.

When a breakpointed instruction fetch causes a Prefetch Abort, the abort is taken, and the 

breakpoint is disregarded. Normally, Prefetch Aborts occur when, for example, an access is 

made to a virtual address that does not physically exist, and the returned data is therefore 

invalid. In such a case, the normal action of the operating system is to swap in the page of 

memory, and to return to the previously-invalid address. This time, when the instruction is 

fetched, and providing the breakpoint is activated (it can be data-dependent), the ARM720T 

processor enters debug state.
The Prefetch Abort, therefore, takes higher priority than the breakpoint.

Table 9-7  Determining the cause of entry to debug state

0

0

Breakpoint

0

1

Watchpoint

1

X

Debug Request (DBGRQ)