National Instruments SCXI-1121 Manuel D’Utilisation
Chapter 2
Configuration and Installation
© National Instruments Corporation
2-43
Figure 2-16. Slot-Select Timing Diagram
To write the 16-bit slot-select number to Slot 0, follow these steps:
1.
Initial conditions:
SERDATIN = don't care
DAQD*/A = don't care
SLOT0SEL* = 1
SERCLK = 1
2.
Clear SLOT0SEL* to 0. This will deassert all SS* lines to all modules
in all chassis.
in all chassis.
3.
For each bit, starting with the most significant bit, perform the
following action:
following action:
a.
SERDATIN = bit to be sent. These bits are the data that is being
written to the Slot-Select Register.
written to the Slot-Select Register.
b.
SERCLK = 0
c.
SERCLK = 1. This rising edge clocks the data.
4.
Set SLOT0SEL* to 1. This will assert the SS* line of the module
whose slot number was written to Slot 0. If multiple chassis are being
used, only the appropriate slot in the chassis whose address
corresponds to the written chassis number will be selected. When no
communication is taking place between the data acquisition board and
any modules, it is recommended that 0 be written to the Slot-Select
Register to ensure that no accidental writes occur.
whose slot number was written to Slot 0. If multiple chassis are being
used, only the appropriate slot in the chassis whose address
corresponds to the written chassis number will be selected. When no
communication is taking place between the data acquisition board and
any modules, it is recommended that 0 be written to the Slot-Select
Register to ensure that no accidental writes occur.
0
1
0 0
1
1 0
1
1
Chassis ID = 9
Slot 11
SERDATIN
SS*X
Chassis Y
SS*11
Chassis 9
SERCLK
SLOT0SEL*
T
ss_dis
T
ss_en
T
clk_wait
T
slot0sel*_wait
T
ss _ dis
SLOT0SEL* low to SS* disabled
200 nsec maximum
T
clk _ wait
SLOT0SEL* low to first rising edge on SERCLK
75 nsec minimum
T
slot0sel* _ wait
Last rising edge on SERCLK to SLOT0SEL* high
250 nsec minimum
T
ss _ en
SLOT0SEL* high to SS* enabled
350 nsec maximum