ECS TIGD-CI4 (V1.1) Manuel D’Utilisation

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Using BIOS
Advanced Chipset Setup
This page sets up more advanced information about your system. Handle this page
with caution. Any changes can affect the operation of your computer.
Configure DRAM Timing by SPD (Enabled)
When this item is set to enable, the DDR timing is configured using SPD. SPD (Serial
Presence Detect) is located on the memory modules, BIOS reads information coded
in SPD during system boot up.
CMOS Setup Utility - Copyright  (C)  1985-2009, American Megatrends, Inc.
                   Advanced Chipset Setup
Configure DRAM Timing by SPD
Enabled
DVMT Memory Select
DVMT Mode
    DVMT/FIXED Memory
265MB
Memory Remap Feature
Enabled
HPET
Enabled
Help Item
By SPD
Manual
Press <Esc> to return to the main menu setting page.
 Options
Memory Remap Feature (Enabled)
This item allows you to remap the overlapped PCI memory above the total physical
memory if you have a 64 bit OS and 8 GB of RAM.
HPET (Enabled)
This item enables or disables HPET (High Precision Event Timer) support.
: Move
F10: Save     ESC: Exit
Enter : Select
+/-/: Value
F9: Load Default Settings
F1: General Help
DVMT Mode Select (DVMT Mode)
This item allows you to select the DVMT operating mode.
DVMT/FIXED Memory (256MB)
When set to Fixed Mode, the graphics driver will reserve a fixed portion of
thesystem memory as graphics memory, according to system and graphics re-
quirements.