Fujifilm Xeon DP S26361-F3310-L280 Fiche De Données
Codes de produits
S26361-F3310-L280
16
Datasheet
2.4
Voltage Identification (VID)
The Voltage Identification (VID) specification for the Low Voltage Intel
®
Xeon™ processor with
800 MHz system bus is defined by the Voltage Regulator Module (VRM) and Enterprise Voltage
Regulator-Down (EVRD) 10.0 Design Guidelines. The voltage set by the VID signals is the
maximum voltage allowed by the processor (please see
Regulator-Down (EVRD) 10.0 Design Guidelines. The voltage set by the VID signals is the
maximum voltage allowed by the processor (please see
for V
CC
overshoot
specifications). VID signals are open drain outputs, which must be pulled up to V
TT
. Please refer to
for the DC specifications for these signals. A minimum voltage is provided in
and
changes with frequency. This allows processors running at a higher frequency to have a relaxed
minimum voltage specification. The specifications have been set such that one voltage regulator
can operate with all supported frequencies.
minimum voltage specification. The specifications have been set such that one voltage regulator
can operate with all supported frequencies.
Individual processor VID values may be calibrated during manufacturing such that two devices at
the same core speed may have different default VID settings. This is reflected by the VID Range
values provided in
the same core speed may have different default VID settings. This is reflected by the VID Range
values provided in
. Refer to the Intel
®
Xeon™ Processor with 800 MHz System Bus
Specification Update for further details on specific valid core frequency and VID values of the
processor.
processor.
The Low Voltage Intel
®
Xeon™ processor with 800 MHz system bus uses six voltage
identification signals, VID[5:0], to support automatic selection of power supply voltages.
specifies the voltage level corresponding to the state of VID[5:0]. A ‘1’ in this table refers to a high
voltage level and a ‘0’ refers to a low voltage level. If the processor socket is empty (VID[5:0] =
x11111), or the voltage regulation circuit cannot supply the voltage that is requested, it must disable
itself. See the Voltage Regulator Module (VRM) Voltage Regulator-Down (EVRD) 10.0 Design
Guidelines or Voltage Regulator Module (VRM) for further details.
voltage level and a ‘0’ refers to a low voltage level. If the processor socket is empty (VID[5:0] =
x11111), or the voltage regulation circuit cannot supply the voltage that is requested, it must disable
itself. See the Voltage Regulator Module (VRM) Voltage Regulator-Down (EVRD) 10.0 Design
Guidelines or Voltage Regulator Module (VRM) for further details.
The Low Voltage Intel
®
Xeon™ processor with 800 MHz system bus provides the ability to
operate while transitioning to an adjacent VID and its associated processor core voltage (V
CC
).
This will represent a DC shift in the load line. It should be noted that a low-to-high or high-to-low
voltage state change may result in as many VID transitions as necessary to reach the target core
voltage. Transitions above the specified VID are not permitted.
voltage state change may result in as many VID transitions as necessary to reach the target core
voltage. Transitions above the specified VID are not permitted.
includes VID step sizes and
DC shift ranges. Minimum and maximum voltages must be maintained as shown in
and
The VRM or VRD used must be capable of regulating its output to the value defined by the new
VID. DC specifications for dynamic VID transitions are included in
VID. DC specifications for dynamic VID transitions are included in
and
. Please
refer to the Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD)
10.0 Design Guidelines for further details.
10.0 Design Guidelines for further details.
Power source characteristics must be guaranteed to be stable whenever the supply to the voltage
regulator is stable.
regulator is stable.