Texas Instruments AFE5809 Evaluation Module AFE5809EVM AFE5809EVM Fiche De Données
Codes de produits
AFE5809EVM
Software Installation and Operation
1. P1 – Power supplies connector ±5 V.
2. JP1, JP2, and JP3 are set to enable 3.3-V, 1.8-V, and 5-V power supplies to the device.
3. JP9: Enables onboard CMOS clock.
4. JP10: Power supply for onboard CMOS clock oscillator.
5. JP15: Enables onboard Vcntl.
6. JP59: Connects 1.4-V supply (LED_LDO should be lit).
7. P17: Disables PDN_Global.
8. P15: Choose the device Common Mode for the I/V Amp Common Mode.
9. P16: Chooses Vss as –5 V for low-side power supply on the I/V Amp.
10. JP16 is set to enable the demodulator internal LDO, as shown in
.
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Software Installation and Operation
The AFE5809EVM GUI (
) can be downloaded from the TI Web site. Follow the directions in the
Read Me First.pdf file to install the GUI and device driver.
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Test Setup
Two EVMs are required to evaluate the AFE5809 device.
shows the exact setup of these two
boards and external connectors. For the default configuration shown in
, having an external
sampling clock and external Vcntl supply is unnecessary. The onboard CMOS clock and onboard Vcntl
are used.
are used.
Figure 2. Default HW Setup With Connection Between TSW1400EVM and AFE5809
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AFE5809EVM Evaluation Module
SLOU338A – October 2012 – Revised November 2012
Copyright © 2012, Texas Instruments Incorporated