STMicroelectronics M24C64-WBN6P Memory IC M24C64-WBN6P Fiche De Données

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M24C64-WBN6P
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DocID16891 Rev 28
M24C64-W M24C64-R M24C64-F 
41
2.5 V
SS
 (ground)
V
SS
 is the reference for the V
CC
 supply voltage.
2.6 
Supply voltage (V
CC
)
2.6.1 
Operating supply voltage (V
CC
)
Prior to selecting the memory and issuing instructions to it, a valid and stable V
CC
 voltage 
within the specified [V
CC
(min), V
CC
(max)] range must be applied (see Operating conditions 
in 
. In order to secure a stable DC supply voltage, it is 
recommended to decouple the V
CC
 line with a suitable capacitor (usually of the order of 
10 nF to 100 nF) close to the V
CC
/V
SS
 package pins.
This voltage must remain stable and valid until the end of the transmission of the instruction 
and, for a write instruction, until the completion of the internal write cycle (t
W
).
2.6.2 Power-up 
conditions
The V
CC
 voltage has to rise continuously from 0 V up to the minimum V
CC
 operating voltage 
(see Operating conditions in 
and the rise time must not 
vary faster than 1 V/µs.
2.6.3 Device 
reset
In order to prevent inadvertent write operations during power-up, a power-on-reset (POR) 
circuit is included.
At power-up, the device does not respond to any instruction until V
CC
 has reached the 
internal reset threshold voltage. This threshold is lower than the minimum V
CC
 operating 
voltage (see Operating conditions in 
). When V
CC
 passes 
over the POR threshold, the device is reset and enters the Standby Power mode; however, 
the device must not be accessed until V
CC
 reaches a valid and stable DC voltage within the 
specified [V
CC
(min), V
CC
(max)] range (see Operating conditions in 
In a similar way, during power-down (continuous decrease in V
CC
), the device must not be 
accessed when V
CC
 drops below V
CC
(min). When V
CC
 drops below the power-on-reset 
threshold voltage, the device stops responding to any instruction sent to it.
2.6.4 Power-down 
conditions
During power-down (continuous decrease in V
CC
), the device must be in the Standby Power 
mode (mode reached after decoding a Stop condition, assuming that there is no internal 
write cycle in progress).