Fiche De Données (M24C64-WBN6P)Table des matières1 Description6Figure 1. Logic diagram6Table 1. Signal names6Figure 2. 8-pin package connections, top view6Figure 3. 5-bump WLCSP connections (top view)7Figure 4. 8-bump thin WLCSP connections (top view)72 Signal description82.1 Serial Clock (SCL)82.2 Serial Data (SDA)82.3 Chip Enable (E2, E1, E0)8Figure 5. Device select code82.4 Write Control (WC)82.5 VSS (ground)92.6 Supply voltage (VCC)92.6.1 Operating supply voltage (VCC)92.6.2 Power-up conditions92.6.3 Device reset92.6.4 Power-down conditions93 Memory organization10Figure 6. Block diagram104 Device operation11Figure 7. I2C bus protocol114.1 Start condition124.2 Stop condition124.3 Data input124.4 Acknowledge bit (ACK)124.5 Device addressing13Table 2. Device select code135 Instructions145.1 Write operations14Table 3. Most significant address byte14Table 4. Least significant address byte145.1.1 Byte Write15Figure 8. Write mode sequences with WC = 0 (data write enabled)155.1.2 Page Write16Figure 9. Write mode sequences with WC = 1 (data write inhibited)165.1.3 Write Identification Page (M24C64-D only)175.1.4 Lock Identification Page (M24C64-D only)175.1.5 ECC (Error Correction Code) and Write cycling175.1.6 Minimizing Write delays by polling on ACK18Figure 10. Write cycle polling flowchart using ACK185.2 Read operations19Figure 11. Read mode sequences195.2.1 Random Address Read205.2.2 Current Address Read205.2.3 Sequential Read205.3 Read Identification Page (M24C64-D only)205.4 Read the lock status (M24C64-D only)216 Initial delivery state217 Maximum rating22Table 5. Absolute maximum ratings228 DC and AC parameters23Table 6. Operating conditions (voltage range W)23Table 7. Operating conditions (voltage range R)23Table 8. Operating conditions (voltage range F)23Table 9. AC measurement conditions24Figure 12. AC measurement I/O waveform24Table 10. Input parameters24Table 11. Cycling performance by groups of four bytes25Table 12. Memory cell data retention25Table 13. DC characteristics (M24C64-W, device grade 6)26Table 14. DC characteristics (M24C64-R, device grade 6)27Table 15. DC characteristics (M24C64-F, M24C64-DF, device grade 6)28Table 16. 400 kHz AC characteristics29Table 17. 1 MHz AC characteristics30Figure 13. Maximum Rbus value versus bus parasitic capacitance (Cbus) for an I2C bus at maximum frequency fC = 400 kHz31Figure 14. Maximum Rbus value versus bus parasitic capacitance Cbus) for an I2C bus at maximum frequency fC = 1MHz31Figure 15. AC waveforms329 Package mechanical data33Figure 16. TSSOP8 – 8-lead thin shrink small outline, package outline33Table 18. TSSOP8 – 8-lead thin shrink small outline, package mechanical data33Figure 17. SO8N – 8-lead plastic small outline, 150 mils body width, package outline34Table 19. SO8N – 8-lead plastic small outline, 150 mils body width, package data34Figure 18. PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package outline35Table 20. PDIP8 – 8-pin plastic DIP, 0.25 mm lead frame, package mechanical data35Figure 19. UFDFPN8 (MLP8) – package outline (UFDFPN: Ultra thin Fine pitch Dual Flat Package, No lead)36Table 21. UFDFPN8 (MLP8) – package dimensions (UFDFPN: Ultra thin Fine pitch Dual Flat Package, No lead)36Figure 20. WLCSP 5-bump wafer-length chip-scale package outline (M24C64-FCS6TP/K)37Table 22. WLCSP 5-bump wafer-length chip-scale package mechanical data (M24C64-FCS6TP/K)37Figure 21. Thin WLCSP 8-bump wafer-length chip-scale package outline (M24C64-DFCT6TP/K)38Table 23. Thin WLCSP 8-bump wafer-length chip-scale package mechanical data (M24C64-DFCT6TP/K)3810 Part numbering39Table 24. Ordering information scheme3911 Revision history40Table 25. Document revision history40Taille: 820 koPages: 42Language: EnglishOuvrir le manuel