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 2010 Microchip Technology Inc.
DS39933D-page 159
PIC18F87J90 FAMILY
REGISTER 15-4:
ALRMCFG: ALARM CONFIGURATION REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
ALRMEN
CHIME
AMASK3
AMASK2
AMASK1
AMASK0
ALRMPTR1 ALRMPTR0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
ALRMEN: Alarm Enable bit
1
 = Alarm is enabled (cleared automatically after an alarm event whenever ARPT<7:0> = 00 
and CHIME = 0)
0
 = Alarm is disabled
bit 6
CHIME: Chime Enable bit
1
 = Chime is enabled; ALRMPTR<1:0> bits are allowed to roll over from 00h to FFh
0
 = Chime is disabled; ALRMPTR<1:0> bits stop once they reach 00h
bit 5-2
AMASK<3:0>: Alarm Mask Configuration bits
0000
 = Every half second
0001
 = Every second
0010
 = Every 10 seconds
0011
 = Every minute
0100
 = Every 10 minutes
0101
 = Every hour
0110
 = Once a day
0111
 = Once a week
1000
 = Once a month
1001
 = Once a year (except when configured for February 29
th
, once every four years)
101x
 = Reserved – do not use
11xx
 = Reserved – do not use
bit 1-0
ALRMPTR<1:0>: Alarm Value Register Window Pointer bits
Points to the corresponding Alarm Value registers when reading the ALRMVALH and ALRMVALL
registers. The ALRMPTR<1:0> value decrements on every read or write of ALRMVALH until it reaches
‘00’.
ALRMVALH:
00
 = ALRMMIN
01
  = ALRMWD
10
  = ALRMMNTH
11
 = Unimplemented
ALRMVALL:
00
 = ALRMSEC
01
  = ALRMHR
10
  = ALRMDAY
11
 = Unimplemented