Microchip Technology MA330025-1 Fiche De Données
2009-2012 Microchip Technology Inc.
DS70616G-page 615
dsPIC33EPXXX(GP/MC/MU)806/810/814 and PIC24EPXXX(GP/GU)810/814
S
Serial Peripheral Interface (SPI) ....................................... 337
Software Simulator (MPLAB SIM)..................................... 497
Software Stack Pointer, Frame Pointer
Software Simulator (MPLAB SIM)..................................... 497
Software Stack Pointer, Frame Pointer
Special Features
Control Registers ...................................................... 339
Helpful Tips ............................................................... 338
Resources................................................................. 338
Helpful Tips ............................................................... 338
Resources................................................................. 338
T
Timing Diagrams
BOR and Master Clear Reset ................................... 517
DCI AC-Link Mode .................................................... 565
DCI Multi -Channel, I
DCI AC-Link Mode .................................................... 565
DCI Multi -Channel, I
ECAN I/O .................................................................. 554
External Clock........................................................... 512
High-Speed PWMx (dsPIC33EPXXX(MC/MU)806/
External Clock........................................................... 512
High-Speed PWMx (dsPIC33EPXXX(MC/MU)806/
I/O Pins ..................................................................... 515
I2Cx Bus Data (Master Mode) .................................. 550
I2Cx Bus Data (Slave Mode) .................................... 552
I2Cx Bus Start/Stop Bits (Master Mode) ................... 550
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 552
Input Capture (ICx) ................................................... 521
OCx/PWMx ............................................................... 522
Output Compare (OCx)............................................. 522
Parallel Master Port Read......................................... 570
Parallel Master Port Write ......................................... 571
Parallel Slave Port .................................................... 569
Power-on Reset ........................................................ 516
QEA/QEB Input......................................................... 524
QEI Module Index Pulse ........................................... 525
SPI1, SPI3 and SPI4 Master Mode (Full-Duplex,
I2Cx Bus Data (Master Mode) .................................. 550
I2Cx Bus Data (Slave Mode) .................................... 552
I2Cx Bus Start/Stop Bits (Master Mode) ................... 550
I2Cx Bus Start/Stop Bits (Slave Mode) ..................... 552
Input Capture (ICx) ................................................... 521
OCx/PWMx ............................................................... 522
Output Compare (OCx)............................................. 522
Parallel Master Port Read......................................... 570
Parallel Master Port Write ......................................... 571
Parallel Slave Port .................................................... 569
Power-on Reset ........................................................ 516
QEA/QEB Input......................................................... 524
QEI Module Index Pulse ........................................... 525
SPI1, SPI3 and SPI4 Master Mode (Full-Duplex,
Timer1-Timer9 External Clock.................................. 518
TimerQ (QEI Module) External Clock ....................... 520
UARTx I/O ................................................................ 554
TimerQ (QEI Module) External Clock ....................... 520
UARTx I/O ................................................................ 554
Timing Specifications
10-Bit ADC Conversion Requirements ..................... 562
12-Bit Mode ADC Conversion Requirements ........... 560
ADC .......................................................................... 556
ADC (10-Bit Mode) ................................................... 558
ADC (12-Bit Mode) ................................................... 557
Auxiliary PLL Clock................................................... 513
DCI AC-Link Mode.................................................... 566
DCI Multi-Channel, I
12-Bit Mode ADC Conversion Requirements ........... 560
ADC .......................................................................... 556
ADC (10-Bit Mode) ................................................... 558
ADC (12-Bit Mode) ................................................... 557
Auxiliary PLL Clock................................................... 513
DCI AC-Link Mode.................................................... 566
DCI Multi-Channel, I
2
DMA Module............................................................. 571
ECAN I/O.................................................................. 554
External Clock Requirements ................................... 512
High-Speed PWMx Requirements (dsPIC33EPXXX
ECAN I/O.................................................................. 554
External Clock Requirements ................................... 512
High-Speed PWMx Requirements (dsPIC33EPXXX
I2Cx Bus Data Requirements (Master Mode)........... 551
I2Cx Bus Data Requirements (Slave Mode)............. 553
Input Capture (ICx) Requirements............................ 521
OCx/PWMx Mode Requirements ............................. 522
Output Compare (OCx) Requirements ..................... 522
Parallel Master Port Read ........................................ 570
Parallel Master Port Write......................................... 571
Parallel Slave Port .................................................... 569
PLL Clock ................................................................. 513
QEI External Clock Requirements............................ 520
QEI Index Pulse Requirements ................................ 525
Quadrature Decoder Requirements ......................... 524
Reset, Watchdog Timer, Oscillator Start-up Timer,
I2Cx Bus Data Requirements (Slave Mode)............. 553
Input Capture (ICx) Requirements............................ 521
OCx/PWMx Mode Requirements ............................. 522
Output Compare (OCx) Requirements ..................... 522
Parallel Master Port Read ........................................ 570
Parallel Master Port Write......................................... 571
Parallel Slave Port .................................................... 569
PLL Clock ................................................................. 513
QEI External Clock Requirements............................ 520
QEI Index Pulse Requirements ................................ 525
Quadrature Decoder Requirements ......................... 524
Reset, Watchdog Timer, Oscillator Start-up Timer,