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DS70290J-page 175

The dsPIC33FJ32GP202/204 and dsPIC33FJ16GP304
devices have up to 13 Analog-to-Digital Conversion
(ADC) module input channels.
The AD12B bit (AD1CON1<10>) allows each of the
ADC modules to be configured as either a 10-bit,
4-sample-and-hold ADC (default configuration) or a
12-bit, 1-sample-and-hold ADC. 

The 10-bit ADC configuration has the following key
features:
• Successive Approximation (SAR) conversion
• Conversion speeds of up to 1.1 Msps
• Up to 13 analog input pins
• External voltage reference input pins
• Simultaneous sampling of up to four analog input 

pins

• Automatic Channel Scan mode
• Selectable conversion trigger source
• Selectable Buffer Fill modes
• Four result alignment options (signed/unsigned, 

fractional/integer)

• Operation during CPU Sleep and Idle modes
• 16-word conversion result buffer

The 12-bit ADC configuration supports all the above
features, except:
• In the 12-bit configuration, conversion speeds of 

up to 500 ksps are supported.

• There is only one sample and hold (S/H) amplifier 

in the 12-bit configuration, so simultaneous 
sampling of multiple channels is not supported.

Depending on the particular device pinout, the ADC
can have up to 13 analog input pins, designated AN0
through AN12. In addition, there are two analog input
pins for external voltage reference connections. These
voltage reference inputs can be shared with other
analog input pins.
The actual number of analog input pins and external
voltage reference input configuration will depend on the
specific device. Refer to the specific device data sheet
for further details. 
A block diagram of the ADC for the
dsPIC33FJ16GP304 and dsPIC33FJ32GP204 devices
is shown in 

. A block diagram of the ADC for

the dsPIC33FJ32GP202 device is shown in

To configure the ADC module:
1.

Select port pins as analog inputs
(AD1PCFGH<15:0> or AD1PCFGL<15:0>).

2.

Select voltage reference source to match
expected range on analog inputs
(AD1CON2<15:13>).

3.

Select the analog conversion clock to match
desired data rate with processor clock
(AD1CON3<7:0>).

4.

Determine how many sample-and-hold
channels will be used (AD1CON2<9:8> and
AD1PCFGH<15:0> or AD1PCFGL<15:0>).

5.

Select the appropriate sample/conversion
sequence (AD1CON1<7:5> and
AD1CON3<12:8>).

6.

Select the way conversion results are presented
in the buffer (AD1CON1<9:8>).
c)

Turn on the ADC module (AD1CON1<15>).

7.

Configure ADC interrupt (if required):
a) Clear the AD1IF bit. 
b) Select ADC interrupt priority.

Note 1: This data sheet summarizes the features

of the dsPIC33FJ32GP202/204 and
dsPIC33FJ16GP304 family of devices. It
is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to
Section 16. “Analog-to-Digital
Converter (ADC)” (DS70183) of the
“dsPIC33F/PIC24H Family Reference
Manual”, which is available on the
Microchip web site
(

www.microchip.com

).

2: Some registers and associated bits

described in this section may not be
available on all devices. Refer to

 in

this data sheet for device-specific register
and bit information.

The ADC module must be disabled before
the AD12B bit can be modified.