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© 2011-2014 Microchip Technology Inc.
DS60001168F-page 113
PIC32MX1XX/2XX
REGISTER 9-9:
DCHxINT: DMA CHANNEL ‘x’ INTERRUPT CONTROL REGISTER 
Bit 
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
23:16
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
CHSDIE
CHSHIE
CHDDIE
CHDHIE
CHBCIE
CHCCIE
CHTAIE
CHERIE
15:8
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
7:0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
CHSDIF
CHSHIF
CHDDIF
CHDHIF
CHBCIF
CHCCIF
CHTAIF
CHERIF
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-24 Unimplemented: Read as ‘0’
bit 23
CHSDIE:
 Channel Source Done Interrupt Enable bit
1
 = Interrupt is enabled
0
 = Interrupt is disabled
bit 22
CHSHIE:
 Channel Source Half Empty Interrupt Enable bit
1
 = Interrupt is enabled
0
 = Interrupt is disabled
bit 21
CHDDIE:
 Channel Destination Done Interrupt Enable bit
1
 = Interrupt is enabled
0
 = Interrupt is disabled
bit 20
CHDHIE:
 Channel Destination Half Full Interrupt Enable bit
1
 = Interrupt is enabled
0
 = Interrupt is disabled
bit 19
CHBCIE:
 Channel Block Transfer Complete Interrupt Enable bit
1
 = Interrupt is enabled
0
 = Interrupt is disabled
bit 18
CHCCIE:
 Channel Cell Transfer Complete Interrupt Enable bit
1
 = Interrupt is enabled
0
 = Interrupt is disabled
bit 17
CHTAIE:
 Channel Transfer Abort Interrupt Enable bit
1
 = Interrupt is enabled
0
 = Interrupt is disabled
bit 16
CHERIE:
 Channel Address Error Interrupt Enable bit
1
 = Interrupt is enabled
0
 = Interrupt is disabled
bit 15-8
Unimplemented:
 Read as ‘0’
bit 7
CHSDIF:
 Channel Source Done Interrupt Flag bit
1
 = Channel Source Pointer has reached end of source (CHSPTR = CHSSIZ)
0
 = No interrupt is pending 
bit 6
CHSHIF:
 Channel Source Half Empty Interrupt Flag bit
1
 = Channel Source Pointer has reached midpoint of source (CHSPTR = CHSSIZ/2) 
0
 = No interrupt is pending 
bit 5
CHDDIF:
 Channel Destination Done Interrupt Flag bit
1
 = Channel Destination Pointer has reached end of destination (CHDPTR = CHDSIZ) 
0
 = No interrupt is pending