Freescale Semiconductor MPC830x PowerQUICC II Pro Processor Evaluation Kit MPC8309-KIT MPC8309-KIT Fiche De Données

Codes de produits
MPC8309-KIT
Page de 79
MPC8309 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
Freescale Semiconductor
75
 
System design information
to minimize inductance. Suggested bulk capacitors—100 to 330 µF (AVX TPS tantalum or Sanyo 
OSCON).
25.4
Output buffer DC impedance
For all buses, the driver is a push-pull single-ended driver type (open drain for I
2
C).
To measure Z
0
 for the single-ended drivers, an external resistor is connected from the chip pad to OV
DD
 
or GND. Then, the value of each resistor is varied until the pad voltage is OV
DD
/2 (see 
). The 
output impedance is the average of two components, the resistances of the pull-up and pull-down devices. 
When data is held high, SW1 is closed (SW2 is open) and R
P
 is trimmed until the voltage at the pad equals 
OV
DD
/2. R
P
 then becomes the resistance of the pull-up devices. R
P
 and R
N
 are designed to be close to each 
other in value. Then, Z
0
= (R
P
+ R
N
)/2.
Figure 45. Driver impedance measurement
The value of this resistance and the strength of the driver’s current source can be found by making two 
measurements. First, the output voltage is measured while driving logic 1 without an external differential 
termination resistor. The measured voltage is V
1
= R
source
× I
source
. Second, the output voltage is measured 
while driving logic 1 with an external precision differential termination resistor of value R
term
. The 
measured voltage is V
2
= (1/(1/R
1
+ 1/R
2
)) 
× I
source
. Solving for the output impedance gives 
R
source
= R
term
× (V
1
/V
2
– 1). The drive current is then I
source
= V
1
/R
source
.
OV
DD
OGND
R
P
R
N
Pad
Data
SW1
SW2