Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Fiche De Données

1095

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

PWM_CPRDUPDx [x=0..3]

0x40000210 [0], 0x40000230 [1], 0x40000250 [2], 0x40000270 [3]

Write-only

This register can only be written if bits WPSWS3 and WPHWS3 are cleared in the 

.

This register acts as a double buffer for the CPRD value. This prevents an unexpected waveform when modifying the 
waveform period.

Only the first 16 bits (channel counter size) are significant.



If the waveform is left-aligned, then the output waveform period depends on the channel counter source clock and can be 
calculated:

– By using the PWM peripheral clock divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32, 64, 

128, 256, 512, or 1024). The resulting period formula will be: 

– By using the PWM peripheral clock divided by one of both DIVA or DIVB divider, the formula becomes, 

respectively: 

If the waveform is center-aligned, then the output waveform period depends on the channel counter source clock and can 
be calculated:

– By using the PWM peripheral clock divided by an X given prescaler value (with X being 1, 2, 4, 8, 16, 32, 64, 

128, 256, 512, or 1024). The resulting period formula will be:

– By using the PWM peripheral clock divided by one of both DIVA or DIVB divider, the formula becomes, 

respectively:

 or 

31

30

29

28

27

26

25

24

–

–

–

–

–

–

–

–

23

22

21

20

19

18

17

16

CPRDUPD

15

14

13

12

11

10

9

8

CPRDUPD

7

6

5

4

3

2

1

0

CPRDUPD

×

(

)

peripheral clock

--------------------------------------------

×

(

)

peripheral clock

--------------------------------------------------------

×

(

)

peripheral clock

--------------------------------------------------------

2

×

×

(

)

peripheral clock

------------------------------------------------------

2

×

×

(

)

peripheral clock

-----------------------------------------------------------------

2

×

×

(

)

peripheral clock

-----------------------------------------------------------------