Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Fiche De Données

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SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

Before programming SCB_VTOR to relocate the vector table, ensure that the vector table entries of the new vector
table are set up for fault handlers, NMI and all enabled exception like interrupts. For more information, see the

The software uses the CPSIE I and CPSID I instructions to enable and disable the interrupts. The CMSIS provides
the following intrinsic functions for these instructions:

void __disable_irq(void) // Disable Interrupts

void __enable_irq(void) // Enable Interrupts

In addition, the CMSIS provides a number of functions for NVIC control, including:

The input parameter IRQn is the IRQ number. For more information about these functions, see the CMSIS
documentation.

To improve software efficiency, the CMSIS simplifies the NVIC register presentation. In the CMSIS:



The Set-enable, Clear-enable, Set-pending, Clear-pending and Active Bit registers map to arrays of 32-bit 
integers, so that:

̶

The array ISER[0] to ISER[1] corresponds to the registers ISER0–ISER1

̶

The array ICER[0] to ICER[1] corresponds to the registers ICER0–ICER1

̶

The array ISPR[0] to ISPR[1] corresponds to the registers ISPR0–ISPR1

̶

The array ICPR[0] to ICPR[1] corresponds to the registers ICPR0–ICPR1

̶

The array IABR[0] to IABR[1] corresponds to the registers IABR0–IABR1



The Interrupt Priority Registers (IPR0–IPR12) provide an 8-bit priority field for each interrupt and each 
register holds four priority fields.

The CMSIS provides thread-safe code that gives atomic access to the Interrupt Priority Registers. 

shows how the interrupts, or IRQ numbers, map onto the interrupt registers and corresponding CMSIS variables
that have one bit per interrupt.

void NVIC_SetPriorityGrouping(uint32_t priority_grouping)

Set the priority grouping

void NVIC_EnableIRQ(IRQn_t IRQn)

Enable IRQn

void NVIC_DisableIRQ(IRQn_t IRQn)

Disable IRQn

uint32_t NVIC_GetPendingIRQ (IRQn_t IRQn)

Return true (IRQ-Number) if IRQn is pending

void NVIC_SetPendingIRQ (IRQn_t IRQn)

Set IRQn pending

void NVIC_ClearPendingIRQ (IRQn_t IRQn)

Clear IRQn pending status

uint32_t NVIC_GetActive (IRQn_t IRQn)

Return the IRQ number of the active interrupt

void NVIC_SetPriority (IRQn_t IRQn, uint32_t priority)

Set priority for IRQn

uint32_t NVIC_GetPriority (IRQn_t IRQn)

Read priority of IRQn

void NVIC_SystemReset (void)

Reset the system

0–31

ISER[0]

ICER[0]

ISPR[0]

ICPR[0]

IABR[0]

32–47

ISER[1]

ICER[1]

ISPR[1]

ICPR[1]

IABR[1]