Atmel Xplained Pro Evaluation Kit ATSAM4E-XPRO ATSAM4E-XPRO Fiche De Données

359

SAM4E [DATASHEET]

Atmel-11157D-ATARM-SAM4E16-SAM4E8-Datasheet_12-Jun-14

WDT_MR

0x400E1854

Read/Write Once

 

Note: The first write access prevents any further modification of the value of this register. Read accesses remain possible.

Note: The WDD and WDV values must not be modified within three slow clock periods following a restart of the watchdog performed by 

a write access in WDT_CR. Any modification will cause the watchdog to trigger an end of period earlier than expected.



Defines the value loaded in the 12-bit watchdog counter. 



0: A watchdog fault (underflow or error) has no effect on interrupt.

1: A watchdog fault (underflow or error) asserts interrupt.



0: A watchdog fault (underflow or error) has no effect on the resets.

1: A watchdog fault (underflow or error) triggers a watchdog reset.



0: If WDRSTEN is 1, a watchdog fault (underflow or error) activates all resets.

1: If WDRSTEN is 1, a watchdog fault (underflow or error) activates the processor reset.



Defines the permitted range for reloading the Watchdog Timer. 

If the Watchdog Timer value is less than or equal to WDD, writing WDT_CR with WDRSTT = 1 restarts the timer. 

If the Watchdog Timer value is greater than WDD, writing WDT_CR with WDRSTT = 1 causes a watchdog error.



0: The watchdog runs when the processor is in debug state.

1: The watchdog stops when the processor is in debug state.



0: The watchdog runs when the system is in idle mode.

31

30

29

28

27

26

25

24

–

–

WDIDLEHLT

WDDBGHLT

WDD

23

22

21

20

19

18

17

16

WDD

15

14

13

12

11

10

9

8

WDDIS

WDRPROC

WDRSTEN

WDFIEN

WDV

7

6

5

4

3

2

1

0

WDV