Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données

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Atmel | SMART SAM D21 [DATASHEET]

Atmel-42181C–SAM-D21_Datasheet–07/2014

After a hard reset, or when waking up from a sleep mode where the XOSC was disabled, the XOSC will need a certain 
amount of time to stabilize on the correct frequency. This start-up time can be configured by changing the Oscillator 
Start-Up Time bit group (XOSC.STARTUP) in the External Multipurpose Crystal Oscillator Control register. During the 
start-up time, the oscillator output is masked to ensure that no unstable clock propagates to the digital logic. The External 
Multipurpose Crystal Oscillator Ready bit in the Power and Clock Status register (PCLKSR.XOSCRDY) is set when the 
user-selected startup time is over. An interrupt is generated on a zero-to-one transition on PCLKSR.XOSCRDY if the 
External Multipurpose Crystal Oscillator Ready bit in the Interrupt Enable Set register (INTENSET.XOSCRDY) is set.
Note:

Do not enter standby mode when an oscillator is in startup:
Wait for the OSCxRDY bit in SYSCTRL.PCLKSR register to be set before going into standby mode.

The XOSC32K can operate in two different modes:

z

External clock, with an external clock signal connected to XIN32

z

Crystal oscillator, with an external 32.768kHz crystal connected between XIN32 and XOUT32

The XOSC32K can be used as a source for generic clock generators, as described in the 

At power-on reset (POR) the XOSC32K is disabled, and the XIN32/XOUT32 pins can be used as General Purpose I/O 
(GPIO) pins or by other peripherals in the system. When XOSC32K is enabled, the operating mode determines the GPIO 
usage. When in crystal oscillator mode, XIN32 and XOUT32 are controlled by the SYSCTRL, and GPIO functions are 
overridden on both pins. When in external clock mode, only the XIN32 pin will be overridden and controlled by the 
SYSCTRL, while the XOUT32 pin can still be used as a GPIO pin.

The external clock or crystal oscillator is enabled by writing a one to the Enable bit (XOSC32K.ENABLE) in the 32kHz 
External Crystal Oscillator Control register. To enable the XOSC32K as a crystal oscillator, a one must be written to the 
XTAL Enable bit (XOSC32K.XTALEN). If XOSC32K.XTALEN is zero, external clock input will be enabled.

The oscillator is disabled by writing a zero to the Enable bit (XOSC32K.ENABLE) in the 32kHz External Crystal Oscillator 
Control register while keeping the other bits unchanged. Writing to the XOSC32K.ENABLE bit while writing to other bits 
may result in unpredictable behavior. The oscillator remains enabled in all sleep modes if it has been enabled 
beforehand. The start-up time of the 32kHz External Crystal Oscillator is selected by writing to the Oscillator Start-Up 
Time bit group (XOSC32K.STARTUP) in the in the 32kHz External Crystal Oscillator Control register. The SYSCTRL 
masks the oscillator output during the start-up time to ensure that no unstable clock propagates to the digital logic. The 
32kHz External Crystal Oscillator Ready bit (PCLKSR.XOSC32KRDY) in the Power and Clock Status register is set 
when the user-selected startup time is over. An interrupt is generated on a zero-to-one transition of 
PCLKSR.XOSC32KRDY if the 32kHz External Crystal Oscillator Ready bit (INTENSET.XOSC32KRDY) in the Interrupt 
Enable Set Register is set.

As a crystal oscillator usually requires a very long start-up time (up to one second), the 32kHz External Crystal Oscillator 
will keep running across resets, except for power-on reset (POR).

-

-

0

Disabled

0

0

1

Always run in IDLE sleep modes. 

Disabled in STANDBY sleep mode.

0

1

1

Only run in IDLE sleep modes if 

requested by a peripheral. Disabled in 

STANDBY sleep mode.

1

0

1

Always run in IDLE and STANDBY sleep 

modes.

1

1

1

Only run in IDLE or STANDBY sleep 

modes if requested by a peripheral.