Atmel Xplained Pro Evaluation Kit for the ATSAMD21J18A Microcontroller ATSAMD21-XPRO ATSAMD21-XPRO Fiche De Données

Codes de produits
ATSAMD21-XPRO
Page de 1018
303
Atmel | SMART SAM D21 [DATASHEET]
Atmel-42181C–SAM-D21_Datasheet–07/2014
19.8.1.13 Pending Channels
Name:
PENDCH
Offset:
0x2C
Reset:
0x00000000
Property:
-
z
Bits 31:12 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always write these bits to 
zero when this register is written. These bits will always return zero when read.
z
Bits 11:0 – PENDCHx [x=11..0]: Pending Channel x
This bit is cleared when trigger execution defined by channel trigger action settings for DMA channel x is started, 
when a bus error for DMA channel x is detected or when DMA channel x is disabled. For details on trigger action 
settings, refer to 
.
This bit is set when a transfer is pending on DMA channel x.
Bit
31
30
29
28
27
26
25
24
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
23
22
21
20
19
18
17
16
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
15
14
13
12
11
10
9
8
PENDCH11
PENDCH10
PENDCH9
PENDCH8
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
PENDCH7
PENDCH6
PENDCH5
PENDCH4
PENDCH3
PENDCH2
PENDCH1
PENDCH0
Access
R
R
R
R
R
R
R
R
Reset
0
0
0
0
0
0
0
0