Texas Instruments SM320F2812-HT Manuel D’Utilisation
www.ti.com
SGUS062A – JUNE 2009 – REVISED APRIL 2010
2.5
Signal Descriptions
specifies the signals on the F2812 device. All digital inputs are TTL-compatible. All outputs are
3.3 V with CMOS levels. Inputs are not 5 V tolerant. A 100
m
A (or 20
m
A) pullup/pulldown is used.
Table 2-3. Signal Descriptions
(1)
PIN NO.
DIE PAD
DIE PAD
DIE PAD
NAME
X-CENTER
Y-CENTER
I/O/Z
(2)
PU/PD
(3)
DESCRIPTION
172-PIN
NO.
(
m
m)
(
m
m)
HFG
XINTF SIGNALS
XA[18]
154
173
42.6
2281.5
O/Z
–
XA[17]
152
171
42.6
2485.3
O/Z
–
XA[16]
149
167
42.6
2819.6
O/Z
–
XA[15]
145
163
42.6
3182.9
O/Z
–
XA[14]
141
157
42.6
3774.9
O/Z
–
XA[13]
138
154
42.6
4029.4
O/Z
–
XA[12]
135
151
42.6
4401.3
O/Z
–
XA[11]
129
145
255.7
5057.5
O/Z
XA[10]
127
143
474.4
5057.5
O/Z
–
XA[9]
122
138
996.5
5057.5
O/Z
–
19-bit XINTF Address Bus
XA[8]
118
134
1492.4
5057.5
O/Z
–
XA[7]
116
131
1825.2
5057.5
O/Z
–
XA[6]
109
124
2566.0
5057.5
O/Z
–
XA[5]
106
121
2937.9
5057.5
O/Z
–
XA[4]
101
116
3518.7
5057.5
O/Z
–
XA[3]
83
96
5361.5
4471.5
O/Z
–
XA[2]
78
91
5361.5
3927.2
O/Z
–
XA[1]
42
49
5024.5
42.6
O/Z
–
XA[0]
18
24
2403.5
42.6
O/Z
XD[15]
144
162
42.6
3306.9
I/O/Z
PU
XD[14]
136
152
42.6
4277.3
I/O/Z
PU
XD[13]
95
110
4194.1
5057.5
I/O/Z
PU
XD[12]
94
109
4318.1
5057.5
I/O/Z
PU
XD[11]
72
85
5361.5
3382.2
I/O/Z
PU
XD[10]
71
84
5361.5
3258.3
I/O/Z
PU
XD[9]
67
77
5361.5
2608.4
I/O/Z
PU
XD[8]
64
74
5361.5
2312.1
I/O/Z
PU
16-bit XINTF Data Bus
XD[7]
53
60
5361.5
1045.9
I/O/Z
PU
XD[6]
38
45
4586.0
42.6
I/O/Z
PU
XD[5]
35
42
4281.2
42.6
I/O/Z
PU
XD[4]
32
39
3966.6
42.6
I/O/Z
PU
XD[3]
29
36
3652.0
42.6
I/O/Z
PU
XD[2]
26
33
3337.5
42.6
I/O/Z
PU
XD[1]
23
30
3022.9
42.6
I/O/Z
PU
XD[0]
20
27
2708.3
42.6
I/O/Z
PU
(1)
Typical drive strength of the output buffer for all pins is 4 mA except for TDO, XCLKOUT, XF, XINTF, EMU0, and EMU1 pins, which are
8 mA.
8 mA.
(2)
I = Input, O = Output, Z = High impedance
(3)
PU = pin has internal pullup; PD = pin has internal pulldown
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