NEC PD78F9488 Manuale Utente

CHAPTER  3   CPU  ARCHITECTURE 

User’s Manual  U15331EJ4V1UD

The memory to be manipulated in the fixed space is directly addressed with 8-bit data in an instruction word. 
The fixed space is the 256-byte space FE20H to FF1FH where the addressing is applied.  Internal high-speed 
RAM and special function registers (SFRs) are mapped at FE20H to FEFFH and FF00H to FF1FH, 
respectively. 
The SFR area (FF00H to FF1FH) where short direct addressing is applied is a part of the whole SFR area.  
Ports that are frequently accessed in a program and the compare register of the timer/event counter are 
mapped in this area, and these SFRs can be manipulated with a small number of bytes and clocks. 
When 8-bit immediate data is at 20H to FFH, bit 8 of an effective address is set to 0.  When it is at 00H to 1FH, 
bit 8 is set to 1.  See [Illustration] below. 

 
[Operand format] 

 

Identifier Description 

saddr 

Label or FE20H to FF1FH immediate data 

saddrp 

Label or FE20H to FF1FH immediate data (even address only) 

 
[Description example] 

MOV FE90H, #50H; When setting saddr to FE90H and the immediate data to 50H  
 

Instruction code

1

1

1

1

0

1

0

1

1

0

0

1

0

0

0

0

0

1

0

1

0

0

0

0

OP code

90H (saddr-offset)

50H (Immediate data)

 

 
[Illustration] 

 

15

0

Short direct memory

Effective
address

1

1

1

1

1

1

1

8

0

7

OP code

saddr-offset

α

When 8-bit immediate data is 20H to FFH, 

α

 = 0.

When 8-bit immediate data is 00H to 1FH, 

α

 = 1.