Manuale UtenteSommarioCOVER1INTRODUCTION8CHAPTER 1 GENERAL261.1 Features261.2 Applications261.3 Ordering Information271.4 Pin Configuration (Top View)281.5 78K/0S Series Lineup311.6 Block Diagram341.7 Overview of Functions35CHAPTER 2 PIN FUNCTIONS372.1 List of Pin Functions372.2 Description of Pin Functions402.2.1 P00 to P07 (Port 0)402.2.2 P10, P11 (Port 1)402.2.3 P20 to P25 (Port 2)402.2.4 P30 to P34 (Port 3)412.2.5 P50 to P53 (Port 5)412.2.6 P60 to P67 (Port 6)422.2.7 P70 to P73 (Port 7)422.2.8 P80 to P87 (Port 8)422.2.9 S0 to S27422.2.10 COM0 to COM3422.2.11 VLC0 to VLC2422.2.12 CAPH, CAPL422.2.13 RESET#432.2.14 X1, X2432.2.15 XT1, XT2432.2.16 AVDD432.2.17 AVSS432.2.18 VDD432.2.19 VSS432.2.20 VPP (flash memory version only)432.2.21 IC0 (mask ROM version only)442.3 Pin I/O Circuits and Recommended Connection of Unused Pins45CHAPTER 3 CPU ARCHITECTURE483.1 Memory Space483.1.1 Internal program memory space523.1.2 Internal data memory space533.1.3 Special function register (SFR) area533.1.4 Data memory addressing543.2 Processor Registers583.2.1 Control registers583.2.2 General-purpose registers613.2.3 Special function registers (SFRs)623.3 Instruction Address Addressing663.3.1 Relative addressing663.3.2 Immediate addressing673.3.3 Table indirect addressing683.3.4 Register addressing683.4 Operand Address Addressing693.4.1 Direct addressing693.4.2 Short direct addressing703.4.3 Special function register (SFR) addressing713.4.4 Register addressing723.4.5 Register indirect addressing733.4.6 Based addressing743.4.7 Stack addressing74CHAPTER 4 PORT FUNCTIONS754.1 Port Functions754.2 Port Configuration764.2.1 Port 0774.2.2 Port 1784.2.3 Port 2794.2.4 Port 3844.2.5 Port 5864.2.6 Port 6874.2.7 Port 7894.2.8 Port 8904.3 Registers Controlling Port Function914.4 Port Function Operation944.4.1 Writing to I/O port944.4.2 Reading from I/O port944.4.3 Arithmetic operation of I/O port94CHAPTER 5 CLOCK GENERATOR955.1 Clock Generator Functions955.2 Clock Generator Configuration955.3 Registers Controlling Clock Generator985.4 System Clock Oscillators1015.4.1 Main system clock oscillator1015.4.2 Subsystem clock oscillator1025.4.3 Example of incorrect resonator connection1035.4.4 Divider circuit1045.4.5 When subsystem clock is not used1045.4.6 Subsystem clock (4 multiplication circuit1045.5 Clock Generator Operation1055.6 Changing Setting of System Clock and CPU Clock1065.6.1 Time required for switching between system clock and CPU clock1065.6.2 Switching between system clock and CPU clock107CHAPTER 6 16-BIT TIMER 201086.1 16-Bit Timer 20 Functions1086.2 16-Bit Timer 20 Configuration1086.3 Registers Controlling 16-Bit Timer 201106.4 16-Bit Timer 20 Operation1136.4.1 Operation as timer interrupt1136.4.2 Operation as timer output1156.4.3 Capture operation1166.4.4 16-bit timer counter 20 readout1176.5 Cautions on Using 16-Bit Timer 201186.5.1 Restrictions when rewriting 16-bit compare register 20118CHAPTER 7 8-BIT TIMERS 50, 60, AND 611207.1 Functions of 8-Bit Timers 50, 60, and 611207.2 Configuration of 8-Bit Timers 50, 60, and 611227.3 Control Registers for 8-Bit Timers 50, 60, and 611287.4 Operation of 8-Bit Timers 50, 60, and 611347.4.1 Operation as 8-bit timer counter1347.4.2 Operation as 16-bit timer counter1437.4.3 Operation as carrier generator1507.4.4 PWM output mode operation (timer 50)1547.4.5 PPG output mode operation (timer 60 and timer 61)1587.5 Cautions on Using 8-Bit Timers 50, 60, and 61160CHAPTER 8 WATCH TIMER1618.1 Watch Timer Functions1618.2 Configuration of Watch Timer1628.3 Control Registers for Watch Timer1638.4 Watch Timer Operation1658.4.1 Operation as watch timer1658.4.2 Operation as interval timer165CHAPTER 9 WATCHDOG TIMER1679.1 Watchdog Timer Functions1679.2 Watchdog Timer Configuration1689.3 Watchdog Timer Control Registers1699.4 Watchdog Timer Operation1719.4.1 Operation as watchdog timer1719.4.2 Operation as interval timer172CHAPTER 10 10-BIT A/D CONVERTER17310.1 10-Bit A/D Converter Functions17310.2 10-Bit A/D Converter Configuration17310.3 10-Bit A/D Converter Control Registers17610.4 10-Bit A/D Converter Operation17810.4.1 Basic operation of 10-bit A/D converter17810.4.2 Input voltage and conversion result17910.4.3 Operation mode of 10-bit A/D converter18110.5 Cautions Related to 10-Bit A/D Converter182CHAPTER 11 SERIAL INTERFACE 2018611.1 Serial Interface 20 Functions18611.2 Serial Interface 20 Configuration18611.3 Serial Interface 20 Control Registers19011.4 Serial Interface 20 Operation19711.4.1 Operation stop mode19711.4.2 Asynchronous serial interface (UART) mode19911.4.3 3-wire serial I/O mode211CHAPTER 12 SERIAL INTERFACE 1A021612.1 Function of Serial Interface 1A021612.2 Configuration of Serial Interface 1A021712.3 Control Registers for Serial Interface 1A021912.4 Serial Interface 1A0 Operation22412.4.1 Operation stop mode22412.4.2 3-wire serial I/O mode22512.4.3 3-wire serial I/O mode with automatic transmit/receive function230CHAPTER 13 LCD CONTROLLER/DRIVER25013.1 LCD Controller/Driver Functions25013.2 LCD Controller/Driver Configuration25013.3 Registers Controlling LCD Controller/Driver25313.4 Setting LCD Controller/Driver25713.5 LCD Display Data Memory25713.6 Common and Segment Signals25813.7 Display Modes26013.7.1 Three-time-slice display example26013.7.2 Four-time-slice display example26313.8 Supplying LCD Drive Voltages VLC0, VLC1, and VLC2266CHAPTER 14 MULTIPLIER26714.1 Multiplier Function26714.2 Multiplier Configuration26714.3 Multiplier Control Register26914.4 Multiplier Operation270CHAPTER 15 REMOTE CONTROLLER RECEIVER (uPD789489, 78F9489 ONLY)27115.1 Remote Controller Receiver Functions27115.2 Remote Controller Receiver Configuration27115.3 Registers to Control Remote Controller Receiver27715.4 Operation of Remote Controller Receiver27915.4.1 Format of type A reception mode27915.4.2 Operation flow of type A reception mode27915.4.3 Timing28115.4.4 Compare register setting28315.4.5 Error interrupt generation timing28515.4.6 Noise elimination287CHAPTER 16 INTERRUPT FUNCTIONS29016.1 Interrupt Function Types29016.2 Interrupt Sources and Configuration29016.3 Registers Controlling Interrupt Function29416.4 Interrupt Servicing Operation30116.4.1 Non-maskable interrupt request acknowledgment operation30116.4.2 Maskable interrupt request acknowledgment operation30316.4.3 Multiple interrupt servicing30416.4.4 Putting interrupt requests on hold306CHAPTER 17 STANDBY FUNCTION30717.1 Standby Function and Configuration30717.1.1 Standby function30717.1.2 Register controlling standby function30817.2 Standby Function Operation30917.2.1 HALT mode30917.2.2 STOP mode312CHAPTER 18 RESET FUNCTION315CHAPTER 19 FLASH MEMORY VERSION31919.1 Flash Memory Characteristics32019.1.1 Programming environment32019.1.2 Communication mode32119.1.3 On-board pin processing32419.1.4 Connection of adapter for flash writing32719.2 Cautions on uPD78F9488 and 78F9489330CHAPTER 20 MASK OPTIONS331CHAPTER 21 INSTRUCTION SET33221.1 Operation33221.1.1 Operand identifiers and description methods33221.1.2 Description of “Operation” column33321.1.3 Description of “Flag” column33321.2 Operation List33421.3 Instructions Listed by Addressing Type339CHAPTER 22 ELECTRICAL SPECIFICATIONS (uPD789488, 78F9488, 789489, 78F9489)342CHAPTER 23 CHARACTERISTICS CURVES OF LCD CONTROLLER/DRIVER (REFERENCE VALUES)362CHAPTER 24 PACKAGE DRAWINGS364CHAPTER 25 RECOMMENDED SOLDERING CONDITIONS366APPENDIX A DEVELOPMENT TOOLS369A.1 Software Package371A.2 Language Processing Software371A.3 Control Software372A.4 Flash Memory Writing Tools372A.5 Debugging Tools (Hardware)373A.6 Debugging Tools (Software)374APPENDIX B NOTES ON TARGET SYSTEM DESIGN375APPENDIX C REGISTER INDEX379APPENDIX D REVISION HISTORY385Dimensioni: 3,52 MBPagine: 388Language: EnglishApri il manuale