NEC PD78F9488 Manuale Utente

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CHAPTER  4   PORT  FUNCTIONS 
76 
User’s Manual  U15331EJ4V1UD
 
Table 4-1.  Port Functions 
Port Name 
Pin Name 
Function 
Port 0 
P00 to P07 
I/O port.  Input/output can be specified in 1-bit units. 
When used as an input port, an on-chip pull-up resistor can be specified in 1-bit units by 
pull-up resistor option register B0 (PUB0) or the key return mode register (KRM00). 
Port 1 
P10, P11 
I/O port.  Input/output can be specified in 1-bit units. 
When used as an input port, an on-chip pull-up resistor can be specified in 1-bit units by 
pull-up resistor option register B1 (PUB1). 
Port 2 
P20 to P25 
I/O port.  Input/output can be specified in 1-bit units. 
When used as an input port, an on-chip pull-up resistor can be specified in 1-bit units by 
pull-up resistor option register B2 (PUB2). 
Port 3 
P30 to P34 
I/O port.  Input/output can be specified in 1-bit units. 
When used as an input port, an on-chip pull-up resistor can be specified in 1-bit units by 
pull-up resistor option register B3 (PUB3). 
Port 5 
P50 to P53 
N-ch open-drain I/O port.  Input/output can be specified in 1-bit units. 
An on-chip pull-up resistor can be specified by mask option. 
Port 6 
P60 to P67 
Input port 
Port 7
Note 1
 
P70 to P73 
Input port (only when input port is selected by mask option or port function register) 
Port 8
Note 2
 
P80 to P87 
I/O port (only when I/O port is selected by mask option or port function register) 
Notes 1.  Whether to use these pins as input port pins (P70 to P73) or segment outputs (S16 to S19) can be 
selected in 1-bit units by means of a mask option in the 
µ
PD789488, 789489 or a port mode register in 
the 
µ
PD78F9488, 78F9489 (refer to 4.3 (3) Port function registers and CHAPTER 20  MASK 
OPTIONS). 
 2.  Whether to use these pins as I/O port pins (P80 to P87) or segment outputs (S20 to S27) can be 
selected in 1-bit units by means of a mask option for the 
µ
PD789488, 789489 or a port mode register in 
the 
µ
PD78F9488, 78F9489 (refer to 4.3 (3) Port function registers and CHAPTER 20  MASK 
OPTIONS). 
 
4.2  Port Configuration 
Ports have the following hardware configuration.  
 
Table 4-2.  Configuration of Port 
Item Configuration 
Control registers 
Port mode registers (PMm: m = 0 to 3, 5, 8) 
Pull-up resistor option registers (PUB0 to PUB3) 
Port function registers (PF7, PF8) (
µ
PD78F9488, 78F9489 only) 
Ports 
Total: 45 (CMOS I/O: 29, CMOS input: 12, N-ch open-drain I/O: 4) 
Pull-up resistors 
•  Mask ROM version 
  Total: 25 (software control: 21, mask option specification: 4) 
•  Flash memory version 
  Total: 21 (software control only)