NEC PD78P214 Manuale Utente
77
Chapter 5 Port Functions
5
5.5.3 Operation
Port 4 is an I/O port. It functions also as an address/data bus (AD0 through AD7).
(1) Output port
When port 4 is in the output mode, its output latch is operable. Once the output latch becomes operable, data
can be transferred between the output latch and the accumulator using a transfer instruction. The output latch
can be loaded with any data by a logical operation instruction. Once the output latch is loaded with some data,
it retains the data until it is loaded
can be transferred between the output latch and the accumulator using a transfer instruction. The output latch
can be loaded with any data by a logical operation instruction. Once the output latch is loaded with some data,
it retains the data until it is loaded
Note
with other data.
Note This includes a case in which any other bit of the same port is manipulated using a bit manipulation instruction.
Fig. 5-22 Port Specified as an Output Port
(2) Input port
The level of each pin of port 3 can be transferred to the accumulator by a transfer instruction. Also in this case,
data can be written to the output latches, and all output latches hold data transferred from the accumulator
by a transfer instruction or other similar instruction, regardless of the current mode of the port operation. If
a pin is specified as an input port, however, the latched data is not output to the port pin because the output
buffer at the pin is in the high-impedance state. (When the pin is switched to the output mode, the contents
of the output latch are output to the port pin.) If a pin is specified as an input port, the contents of the output
latch for that pin cannot be transferred to the accumulator.
data can be written to the output latches, and all output latches hold data transferred from the accumulator
by a transfer instruction or other similar instruction, regardless of the current mode of the port operation. If
a pin is specified as an input port, however, the latched data is not output to the port pin because the output
buffer at the pin is in the high-impedance state. (When the pin is switched to the output mode, the contents
of the output latch are output to the port pin.) If a pin is specified as an input port, the contents of the output
latch for that pin cannot be transferred to the accumulator.
Fig. 5-23 Port Specified as an Input Port
Caution
Although its ultimate purpose is to manipulate only 1 bit, a bit manipulation instruction accesses a port in 8-bit units. If a
bit manipulation instruction is used for a port specified to be in the input mode, the contents of the output latch become
undefined (except for the bits manipulated by the SET1 or CLR1 instruction). Special care should be taken if bits are switched
between the input and output modes. The same holds true when the port is manipulated using 8-bit arithmetic/logical
instructions.
bit manipulation instruction is used for a port specified to be in the input mode, the contents of the output latch become
undefined (except for the bits manipulated by the SET1 or CLR1 instruction). Special care should be taken if bits are switched
between the input and output modes. The same holds true when the port is manipulated using 8-bit arithmetic/logical
instructions.
P4n
n = 0 to 7
Internal bus
WR
PORT
RD
OUT
Output
Iatch
Internal bus
WR
PORT
P4n
n = 0 to 7
n = 0 to 7
Output
Iatch
RD
IN