Intel 220 LE80557RE009512 Scheda Tecnica

54

Datasheet

DBR#

Output

DBR# (Data Bus Reset) is used only in processor systems where no 
debug port is implemented on the system board. DBR# is used by a 
debug port interposer so that an in-target probe can drive system 
reset. If a debug port is implemented in the system, DBR# is a no 
connect in the system. DBR# is not a processor signal.

DBSY#

Input/

Output

DBSY# (Data Bus Busy) is asserted by the agent responsible for 
driving data on the FSB to indicate that the data bus is in use. The 
data bus is released after DBSY# is de-asserted. This signal must 
connect the appropriate pins on both FSB agents.

DEFER#

Input

DEFER# is asserted by an agent to indicate that a transaction cannot 
be ensured in-order completion. Assertion of DEFER# is normally the 
responsibility of the addressed memory or Input/Output agent. This 
signal must connect the appropriate pins of both FSB agents.

DINV[3:0]#

Input/

Output

DINV[3:0]# (Data Bus Inversion) are source synchronous and 
indicate the polarity of the D[63:0]# signals. The DINV[3:0]# signals 
are activated when the data on the data bus is inverted. The bus 
agent will invert the data bus signals if more than half the bits, within 
the covered group, would change level in the next cycle.

DPRSTP#

Input

DPRSTP# is not used by the Celeron processor. 

DPWR#

Input

DPWR# is a control signal used by the chipset to reduce power on 
the processor data bus input buffers. This is not used by the 
processor. 

DRDY#

Input/

Output

DRDY# (Data Ready) is asserted by the data driver on each data 
transfer, indicating valid data on the data bus. In a multi-common 
clock data transfer, DRDY# may be de-asserted to insert idle clocks. 
This signal must connect the appropriate pins of both FSB agents.

DSTBN[3:0]#

Input/

Output

Data strobe used to latch in D[63:0]#.

DINV[3]#

D[63:48]#

DINV[2]#

D[47:32]#

DINV[1]#

D[31:16]#

DINV[0]#

D[15:0]#

D[15:0]#, DINV[0]# 

DSTBN[0]#

D[31:16]#, DINV[1]#  DSTBN[1]#

D[47:32]#, DINV[2]#  DSTBN[2]#

D[63:48]#, DINV[3]#  DSTBN[3]#