HP A2Y15AV Manuale Utente

Datasheet, Volume 2

203

Processor Configuration Registers 

0–103h

RSVD

Reserved

0h

RO

104–107h

PVCCAP1

Port VC Capability Register 1

00000000h

 RO

108–10Bh

PVCCAP2

Port VC Capability Register 2

00000000h

 RO

10C–10Dh

PVCCTL

Port VC Control

0000h

 RW, RO

10E–10Fh

RSVD

Reserved

0h

RO

110–113h

VC0RCAP

VC0 Resource Capability

00000001h

 RO

114–117h

VC0RCTL

VC0 Resource Control

800000FFh

 RO, RW

118–119h

RSVD

Reserved

0h

RO

11A–11Bh

VC0RSTS

VC0 Resource Status

0002h

 RO-V

11C–13Fh

RSVD

Reserved

0h

RO

140–143h

RCLDECH

Root Complex Link Declaration Enhanced

00010005h

 RO-V, RO

144–147h

ESD

Element Self Description

05000100h

 RO, RW-O

148–14Fh

RSVD

Reserved

0h

RO

150–153h

LE1D

Link Entry 1 Description

00000000h

 RO, RW-O

154–157h

RSVD

Reserved

0h

RO

158–15Bh

LE1A

Link Entry 1 Address

00000000h

 RW-O

15C–15Fh

LE1AH

Link Entry 1 Address

00000000h

 RW-O

160–23Fh

RSVD

Reserved

0h

RO

240–243h

APICBASE

APIC Base address

00000000h

 RW

244–247h

APICLIMIT

APIC Base address Limit

00000000h

 RW,

248–C33h

RSVD

Reserved

—

—

C34–C37h

CMNRXERR

Common Rx Error Register

00000000h

 RW1CS

C38–D0Bh

RSVD

Reserved

0h

RO

D0C–D0Fh

PEGTST

PCI Express Test Modes

00000000h

 RO-FW, 

RW

D10–D33h

RSVD

Reserved

0h

RO

D34–D37h

PEGUPDNCFG

PEG UPconfig/DNconfig Control

0000001Fh

 RW, 

RW1CS

D38–D6Bh

RSVD

Reserved

0h

RO

D6C–D6Fh

BGFCTL3

BGF Control 3

400204E0h

 RW

D70–DBFh

RSVD

Reserved

0h

RO

DC0–DC3h

EQPRESET1_2

Equalization Preset 1/2 Register

3400FBC0h

 RW

DC4–DC7h

EQPRESET2_3_4

Equalization Preset 2/3/4 Register

0037100Ah

 RW

DC8–DCBh

RSVD

Reserved

0h

RO

DCC–DCFh

EQPRESET6_7

Equalization Preset 6/7 Register

36200E06h

 RW

DD0–DD7h

RSVD

Reserved

0h

RO

DD8–DDBh

EQCFG

Equalization Configuration Register

00000000h

 RW