HP A2Y15AV Manuale Utente
Processor Configuration Registers
310
Datasheet, Volume 2
2.21.1
VER_REG—Version Register
This register reports the architecture version supported. Backward compatibility for the
architecture is maintained with new revision numbers, allowing software to load
remapping hardware drivers written for prior architecture versions.
architecture is maintained with new revision numbers, allowing software to load
remapping hardware drivers written for prior architecture versions.
AC–AFh
IEUADDR_REG
Invalidation Event Upper Address
Register
00000000h
RW-L
B0–B7h
RSVD
Reserved
0h
RO
B8–BFh
IRTA_REG
Interrupt Remapping Table Address
Register
0000000000000
000h
RW-L
C0–FFh
RSVD
Reserved
0h
RO
100–107h
IVA_REG
Invalidate Address Register
0000000000000
000h
RW
108–10Fh
IOTLB_REG
IOTLB Invalidate Register
0000000000000
000h
RW, RW-V, RO-V
110–FF3h
RSVD
Reserved
—
—
Table 2-24. Default PEG/DMI VTd Remapping Engine Register Address Map (Sheet 2 of 2)
Address
Offset
Symbol
Register Name
Reset Value
Access
B/D/F/Type:
0/0/0/VC0PREMAP
Address Offset:
0–3h
Reset Value:
00000010h
Access:
RO
Size:
32 bits
BIOS Optimal Default
000000h
Bit
Access
Reset
Value
RST/
PWR
Description
31:8
RO
0h
Reserved (RSVD)
7:4
RO
0001b
Uncore
Major Version number (MAX)
This field indicates supported architecture version.
This field indicates supported architecture version.
3:0
RO
0000b
Uncore
Minor Version number (MIN)
This bit indicates supported architecture minor version.
This bit indicates supported architecture minor version.