HP A2Y15AV Manuale Utente

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Datasheet, Volume 2
47
Processor Configuration Registers 
2.5
PCI Device 0 Function 0 Configuration Space 
Registers
Table 2-8.
PCI Device 0, Function 0 Configuration Space Register Address Map (Sheet 1 
of 2)
Address 
Offset
Register 
Symbol
Register Name
Reset Value
Access
0–1h
VID
Vendor Identification
8086h
 RO
2–3h
DID
Device Identification
0150h
 RO-FW, RO-V
4–5h
PCICMD
PCI Command
0006h
 RO, RW
6–7h
PCISTS
PCI Status
0090h
 RW1C, RO
8h
RID
Revision Identification
00h
 RO-FW
9–Bh
CC
Class Code
060000h
 RO
C–Dh
RSVD
Reserved
0h
RO
Eh
HDR
Header Type
00h
 RO
F–2Bh
RSVD
Reserved
0h
RO
2C–2Dh
SVID
Subsystem Vendor Identification
0000h
 RW-O
2E–2Fh
SID
Subsystem Identification
0000h
 RW-O
30–33h
RSVD
Reserved
0h
RO
34h
CAPPTR
Capabilities Pointer
E0h
 RO
35–3Fh
RSVD
Reserved
0h
RO
40–47h
PXPEPBAR
PCI Express Egress Port Base Address
00000000000
00000h
 RW
48–4Fh
MCHBAR
Host Memory Mapped Register Range Base
00000000000
00000h
 RW
50–51h
GGC
GMCH Graphics Control Register
0028h
 RW-L, RW-KL
52–53h
RSVD
Reserved
0h
RO
54–57h
DEVEN
Device Enable
0000209Fh
 RW-L, RO, RW
58–5Bh
PAVPC
Protected Audio Video Path Control
00000000h
 RW-L, RW-KL
5C–5Fh
DPR
DMA Protected Range
00000000h
 RW-L, RO-V, 
RW-KL
60–67h
PCIEXBAR
PCI Express Register Range Base Address
00000000000
00000h
 RW, RW-V
68–6Fh
DMIBAR
Root Complex Register Range Base Address
00000000000
00000h
 RW
70–77h
MESEG_BASE
Intel Management Engine Base Address 
Register
0000007FFFF0
0000h
 RW-L
78–7Fh
MESEG_MASK
Intel Management Engine Limit Address 
Register
00000000000
00000h
 RW-L, RW-KL
80h
PAM0
Programmable Attribute Map 0
00h
 RW
81h
PAM1
Programmable Attribute Map 1
00h
 RW
82h
PAM2
Programmable Attribute Map 2
00h
 RW
83h
PAM3
Programmable Attribute Map 3
00h
 RW
84h
PAM4
Programmable Attribute Map 4
00h
 RW
85h
PAM5
Programmable Attribute Map 5
00h
 RW
86h
PAM6
Programmable Attribute Map 6
00h
 RW
87h
LAC
Legacy Access Control
00h
 RW
88h
RSVD
Reserved
02h
 RW-LV, RW-L, 
RW-KL, RO