Acer E3-1220 v3 KC.12201.3E3 Manuale Utente

TDO

Test Data Out: This signal transfers serial test data out

of the processor. This signal provides the serial output

needed for JTAG specification support.

O

Open Drain

TMS

Test Mode Select: This is a JTAG specification

supported signal used by debug tools.

I

GTL

TRST#

Test Reset: This signal resets the Test Access Port

(TAP) logic. This signal must be driven low during power

on Reset.

I

GTL

CATERR#

Catastrophic Error: This signal indicates that the system has

experienced a catastrophic error and cannot continue to

operate. The processor will set this for non-recoverable

machine check errors or other unrecoverable internal errors.

CATERR# is used for signaling the following types of errors:

Legacy MCERRs, CATERR# is asserted for 16 BCLKs. Legacy

IERRs, CATERR# remains asserted until warm or cold reset.

O

GTL

PECI

Platform Environment Control Interface: A serial

sideband interface to the processor, it is used primarily for

thermal, power, and error management.

I/O

Asynchronous

PROCHOT#

Processor Hot: PROCHOT# goes active when the processor

temperature monitoring sensor(s) detects that the processor

has reached its maximum safe operating temperature. This

indicates that the processor Thermal Control Circuit (TCC) has

been activated, if enabled. This signal can also be driven to

the processor to activate the TCC.

GTL Input

Open-Drain Output

THERMTRIP#

Thermal Trip: The processor protects itself from catastrophic

overheating by use of an internal thermal sensor. This sensor

is set well above the normal operating temperature to ensure

that there are no false trips. The processor will stop all

execution when the junction temperature exceeds

approximately 130 °C. This is signaled to the system by the

THERMTRIP# pin.

O

Asynchronous OD

Asynchronous CMOS

Intel

®

 Xeon

®

 Processor E3-1200 v3 Product Family

June 2013

Datasheet – Volume 1 of 2

Order No.: 328907-001

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