Fujifilm Xeon S26361-F3099-L828 Scheda Tecnica
Codici prodotto
S26361-F3099-L828
80
Datasheet
Due to the inability of processors to recognize bus transactions during the Sleep state,
multiprocessor systems are not allowed to simultaneously have one processor in Sleep state and the
other processors in Normal or Stop-Grant state.
multiprocessor systems are not allowed to simultaneously have one processor in Sleep state and the
other processors in Normal or Stop-Grant state.
7.2.1
Normal State
This is the normal operating state for the processor.
7.2.2
HALT Power-Down State
HALT is a low power state entered when all logical processors have executed the HALT or
MWAIT instruction. When one of the logical processors executes the HALT or MWAIT
instruction, that logical processor is halted; however, the other processor continues normal
operation. The processor will transition to the Normal state upon the occurrence of SMI#, BINIT#,
INIT#, LINT[1:0] (NMI, INTR), or an interrupt delivered over the front side bus. RESET# will
cause the processor to immediately initialize itself.
MWAIT instruction. When one of the logical processors executes the HALT or MWAIT
instruction, that logical processor is halted; however, the other processor continues normal
operation. The processor will transition to the Normal state upon the occurrence of SMI#, BINIT#,
INIT#, LINT[1:0] (NMI, INTR), or an interrupt delivered over the front side bus. RESET# will
cause the processor to immediately initialize itself.
The return from a System Management Interrupt (SMI) handler can be to either Normal Mode or
the HALT Power Down state. See the IA-32 Intel
the HALT Power Down state. See the IA-32 Intel
®
Architecture Software Developer's Manual,
Volume III: System Programming Guide for more information.
The system can generate a STPCLK# while the processor is in the HALT Power Down state. When
the system deasserts the STPCLK# interrupt, the processor will return execution to the HALT state.
the system deasserts the STPCLK# interrupt, the processor will return execution to the HALT state.
While in HALT Power Down state, the processor will process front side bus snoops and interrupts.