Fujifilm Xeon 5050 S26361-F3248-L300 Scheda Tecnica

Dual-Core Intel® Xeon® Processor 5000 Series Datasheet

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1.

For functional operation, all processor electrical, signal quality, mechanical and thermal specifications must 

be satisfied.

2.

Overshoot and undershoot voltage guidelines for input, output, and I/O signals are outlined in 

. 

Excessive overshoot or undershoot on any signal will likely result in permanent damage to the processor.

3.

Storage temperature is applicable to storage conditions only. In this scenario, the processor must not 

receive a clock, and no lands can be connected to a voltage bias. Storage within these limits will not affect 

the long-term reliability of the device. For functional operation, please refer to the processor case 

temperature specifications.

4.

This rating applies to the processor and does not include any tray or packaging.

5.

Failure to adhere to this specification can affect the long term reliability of the processor.

The processor DC specifications in this section are defined at the processor 
core (pads) unless noted otherwise. See 

 for the Dual-Core Intel Xeon 

Processor 5000 series land listings and 

 for signal definitions. Voltage and 

current specifications are detailed in 

. For platform planning refer to 

, which provides Voltage-Current projections. This same information is 

presented graphically in 

BSEL[2:0] and VID[5:0] signals are specified in 

. The DC specifications for 

the AGTL+ signals are listed in 

. Legacy signals and Test Access Port (TAP) 

signals follow DC specifications similar to GTL+. The DC specifications for the 
PWRGOOD input and TAP signal group are listed in 

 and the Asynchronous 

GTL+ signal group is listed in 

. The VTTPWRGD signal is detailed in 

.

 through 

 list the DC specifications for the processor and are valid 

only while meeting specifications for case temperature (T

CASE

 as specified in 

clock frequency, and input voltages. Care should be taken to read all notes 
associated with each parameter. 

VID

VID range

1.0750

1.3500

V

V

CC

V

CC

 for Dual-Core Intel Xeon 

Processor 5000 series core. FMB 

processor.

See 

 and 

V

2, 3, 4, 6, 

11

V

VID_STEP

VID step size during a transition

± 12.5

mV

V

VID_SHIFT

Total allowable DC load line shift 

from VID steps

425

mV

12

V

TT

FSB termination voltage (DC + AC 

specification)

1.140

1.20

1.260

V

10, 14

I

CC

I

CC

 for Dual-Core Intel Xeon 

Processor 5000 series with multiple 

VID (667 MHz)

115

A

4, 5, 6, 11

I

CC

I

CC

 for Dual-Core Intel Xeon 

Processor 5000 series with multiple 

VID (1066 MHz)

150

A

4, 5, 6, 11

I

CC

I

CC

 for Dual-Core Intel Xeon 

Processor 5063 (MV) with multiple 

VID

115

A

4, 5, 6, 11

I

CC_RESET

I

CC_RESET

 for Dual-Core Intel Xeon 

Processor 5000 series with multiple 

VID (667 MHz)

115

A

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