Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manuale Utente
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DEMO9S12XHY256
Motor Controller (MC10B8CV1)
MC9S12XHY-Family Reference Manual, Rev. 1.04
674
Freescale Semiconductor
.
20.3.2.2
Motor Controller Control Register 1
This register controls the behavior of the analog section of the motor controller as well as the interrupt
enables.
enables.
Table 20-4. Prescaler Values
MCPRE[1:0]
f
TC
00
f
Bus
01
f
Bus
/2
10
f
Bus
/4
11
f
Bus
/8
Offset Module Base + 0x0001
7
6
5
4
3
2
1
0
R
RECIRC
0
0
0
0
0
0
MCTOIE
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 20-4. Motor Controller Control Register 1 (MCCTL1)
Table 20-5. MCCTL1 Field Descriptions
Field
Description
7
RECIRC
Recirculation in (Dual) Full H-Bridge Mode (refer to
)— RECIRC only
affects the outputs in (dual) full H-bridge modes. In half H-bridge mode, the PWM output is always active low.
RECIRC = 1 will also invert the effect of the S bits (refer to
RECIRC = 1 will also invert the effect of the S bits (refer to
) in (dual) full
H-bridge modes. RECIRC must be changed only while no PWM channel is operating in (dual) full H-bridge
mode; otherwise, erroneous output pattern may occur.
mode; otherwise, erroneous output pattern may occur.
0 Recirculation on the high side transistors. Active state for PWM output is logic low, the static channel will
output logic high.
1 Recirculation on the low side transistors. Active state for PWM output is logic high, the static channel will
output logic low.
0
MCTOIE
Motor Controller Timer Counter Overflow Interrupt Enable
0 Interrupt disabled.
1 Interrupt enabled. An interrupt will be generated when the motor controller timer counter overflow interrupt flag
1 Interrupt enabled. An interrupt will be generated when the motor controller timer counter overflow interrupt flag
(MCTOIF) is set.