Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 Manuale Utente

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DEMO9S12XHY256
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Electrical Characteristics
MC9S12XHY-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
737
The minimum program and erase times shown in
 are calculated for maximum f
NVMOP
 and
maximum f
NVMBUS
 unless otherwise shown. The maximum times are calculated for minimum f
NVMOP
A.3.1.1
Erase Verify All Blocks (Blank Check) (FCMD=0x01)
The time it takes to perform a blank check is dependant on the location of the first non-blank word starting
at relative address zero. It takes one bus cycle per phrase to verify plus a setup of the command. Assuming
that no non blank location is found, then the erase verify all blocks is given by.
A.3.1.2
Erase Verify Block (Blank Check) (FCMD=0x02)
The time it takes to perform a blank check is dependant on the location of the first non-blank word starting
at relative address zero. It takes one bus cycle per phrase to verify plus a setup of the command. Assuming
that no non blank location is found, then the erase verify time for a single 256K NVM array is given by
For a 128K NVM or D-Flash array the erase verify time is given by
A.3.1.3
Erase Verify P-Flash Section (FCMD=0x03)
The maximum time depends on the number of phrases being verified (N
VP
)
A.3.1.4
Read Once (FCMD=0x04)
The maximum read once time is given by
A.3.1.5
Program P-Flash (FCMD=0x06)
The programming time for a single phrase of four P-Flash words + associated eight ECC bits is dependant
on the bus frequency as a well as on the frequency f
NVMOP
 and can be calculated according to the
following formulas.
t
check
33500
1
f
NVMBUS
---------------------
=
t
check
33500
1
f
NVMBUS
---------------------
=
t
check
17200
1
f
NVMBUS
---------------------
=
t
check
752
N
VP
+
(
)
1
f
NVMBUS
---------------------
=
t
400
(
)
1
f
NVMBUS
---------------------
=