Analog Devices AD9609 Evaluation Board AD9609-65EBZ AD9609-65EBZ Scheda Tecnica
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AD9609-65EBZ
AD9609
Rev. 0 | Page 5 of 32
AC SPECIFICATIONS
AVDD = 1.8 V; DRVDD = 1.8 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference; AIN = −1.0 dBFS, 50% duty
cycle clock, DCS disabled, unless otherwise noted.
cycle clock, DCS disabled, unless otherwise noted.
Table 2.
Parameter
AD9609-20/AD9609-40 AD9609-65 AD9609-80
Unit
Min
Typ
Max Min Typ Max Min Typ Max
SIGNAL-TO-NOISE
RATIO
(SNR)
f
IN
= 9.7 MHz
25°C
61.7
61.5
61.5
dBFS
f
IN
= 30.5 MHz
25°C
61.7
61.5
61.5
dBFS
Full
61.2
61.0
dBFS
f
IN
= 70 MHz
25°C
61.6
61.5
61.5
dBFS
Full
61.0
dBFS
f
IN
= 200 MHz
25°C
61.0
61.0
dBFS
SIGNAL-TO-NOISE-AND-DISTORTION
(SINAD)
f
IN
= 9.7 MHz
25°C
61.6
61.4
61.4
dBFS
f
IN
= 30.5 MHz
25°C
61.5
61.3
61.4
dBFS
Full
60.7/60.9
60.5
dBFS
f
IN
= 70 MHz
25°C
61.5
61.4
61.4
dBFS
Full
60.5
dBFS
f
IN
= 200 MHz
25°C
60
60
dBFS
EFFECTIVE NUMBER OF BITS (ENOB)
f
IN
= 9.7 MHz
25°C
9.9
9.9
9.9
Bits
f
IN
= 30.5 MHz
25°C
9.9
9.9
9.9
Bits
f
IN
= 70 MHz
25°C
9.9
9.9
9.9
Bits
f
IN
= 200 MHz
25°C
9.6
9.6
Bits
WORST SECOND OR THIRD HARMONIC
f
IN
= 9.7 MHz
25°C
−81
−78
−78
dBc
f
IN
= 30.5 MHz
25°C
−80
−80
−80
dBc
Full
−67
−65.5
dBc
f
IN
= 70 MHz
25°C
−82
−78
−78
dBc
Full
−68
dBc
f
IN
= 200 MHz
25°C
−73
−73
dBc
SPURIOUS-FREE DYNAMIC RANGE (SFDR)
f
IN
= 9.7 MHz
25°C
78
75
75
dBc
f
IN
= 30.5 MHz
25°C
80.5
75
75
dBc
Full
67
65.5
dBc
f
IN
= 70 MHz
25°C
78
75
75
dBc
Full
68
dBc
f
IN
= 200 MHz
25°C
73
73
dBc
WORST OTHER (HARMONIC OR SPUR)
f
IN
= 9.7 MHz
25°C
−82
−80
−80
dBc
f
IN
= 30.5 MHz
25°C
−82
−80
−80
dBc
Full
−74
−72
dBc
f
IN
= 70 MHz
25°C
−82
−80
−80
dBc
Full
−73
dBc
f
IN
= 200 MHz
25°C
−80
−80
dBc
TWO-TONE
SFDR
f
IN
= 30.5 MHz (−7 dBFS), 32.5 MHz (−7 dBFS)
25°C
78
78
dBc
ANALOG
INPUT
BANDWIDTH
25°C
700 700
700
MHz
1
See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions.