Atmel Evaluation Kit AT91SAM9X25-EK AT91SAM9X25-EK Scheda Tecnica

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AT91SAM9X25-EK
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201
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
22.13.13PMC SMD Clock Register
Name:
PMC_SMD
Address:
0xFFFFFC3C
Access :
Read-write 
• SMDS: SMD input clock selection
0 = SMD Clock Input is PLLA
1 = SMD Clock Input is UPLL
• SMDDIV: Divider for SMD Clock.
SMD Clock is Input clock divided by SMD +1
31
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25
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22
21
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9
8
SMDDIV
7
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2
1
0
SMDS