Atmel Xplained Pro Evaluation Kit ATSAMD20-XPRO ATSAMD20-XPRO Scheda Tecnica
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ATSAMD20-XPRO
280
Atmel | SMART SAM D20 [DATASHEET]
Atmel-42129K–SAM-D20_datasheet–06/2014
21.
PORT
21.1
Overview
The Port (PORT) controls the I/O pins of the microcontroller. The I/O pins are organized in a series of groups, collectively
referred to as a line bundle, and each group can have up to 32 pins that can be configured and controlled individually or
as a group. Each pin may either be used for general-purpose I/O under direct application control or assigned to an
embedded device peripheral. When used for general-purpose I/O, each pin can be configured as input or output, with
highly configurable driver and pull settings.
referred to as a line bundle, and each group can have up to 32 pins that can be configured and controlled individually or
as a group. Each pin may either be used for general-purpose I/O under direct application control or assigned to an
embedded device peripheral. When used for general-purpose I/O, each pin can be configured as input or output, with
highly configurable driver and pull settings.
All I/O pins have true read-modify-write functionality when used for general-purpose I/O; the direction or the output value
of one or more pins may be changed (set, reset or toggled) without unintentionally changing the state of any other pins in
the same line bundle via a single, atomic 8-, 16- or 32-bit write.
of one or more pins may be changed (set, reset or toggled) without unintentionally changing the state of any other pins in
the same line bundle via a single, atomic 8-, 16- or 32-bit write.
The PORT is connected to the high-speed bus matrix through an AHB/APB bridge. The Pin Direction, Data Output Value
and Data Input Value registers may also be accessed using the low-latency CPU local bus (IOBUS; ARM
and Data Input Value registers may also be accessed using the low-latency CPU local bus (IOBUS; ARM
®
single-cycle
I/O port).
21.2
Features
z
Selectable input and output configuration individually for each pin
z
Software-controlled multiplexing of peripheral functions on I/O pins
z
Flexible pin configuration through a dedicated Pin Configuration register
z
Configurable output driver and pull settings:
z
Totem-pole (push-pull)
z
Pull configuration
z
Driver strength
z
Configurable input buffer and pull settings:
z
Internal pull-up or pull-down
z
Input sampling criteria
z
Input buffer can be disabled if not needed for lower power consumption
z
Read-modify-write support for pin configuration, output value and pin direction