STMicroelectronics 250W TRANSITION-MODE PFC PRE-REGULATOR WITH L6563S EVL6563S-250W EVL6563S-250W Scheda Tecnica
Codici prodotto
EVL6563S-250W
AN3119
Test results and significant waveforms
Doc ID 16849 Rev 2
15/32
4.3
Voltage feed-forward and brown-out function
The power stage gain of PFC pre-regulators varies with the square of the RMS input
voltage. As does the crossover frequency fc of the overall open-loop gain because the gain
has a single pole characteristic. This leads to large trade-offs in the design. For example,
setting the gain of the error amplifier to get fc = 20 Hz @ 264 Vac means having fc = 4 Hz @
88 Vac, resulting in sluggish control dynamics. Additionally, the slow control loop causes
large transient current flow during rapid line or load changes that are limited by the
dynamics of the multiplier output. This limit is considered when selecting the sense resistor
to let the full load power pass under minimum line voltage conditions, with some margin. But
a fixed current limit allows excessive power input at high line, whereas a fixed power limit
requires the current limit to vary inversely with the line voltage.
voltage. As does the crossover frequency fc of the overall open-loop gain because the gain
has a single pole characteristic. This leads to large trade-offs in the design. For example,
setting the gain of the error amplifier to get fc = 20 Hz @ 264 Vac means having fc = 4 Hz @
88 Vac, resulting in sluggish control dynamics. Additionally, the slow control loop causes
large transient current flow during rapid line or load changes that are limited by the
dynamics of the multiplier output. This limit is considered when selecting the sense resistor
to let the full load power pass under minimum line voltage conditions, with some margin. But
a fixed current limit allows excessive power input at high line, whereas a fixed power limit
requires the current limit to vary inversely with the line voltage.
Voltage feed-forward can compensate for the gain variation with the line voltage and allow
all of the above-mentioned issues to be overcome. It consists of deriving a voltage
proportional to the input RMS voltage, feeding this voltage into a squarer/divider circuit (1/V
all of the above-mentioned issues to be overcome. It consists of deriving a voltage
proportional to the input RMS voltage, feeding this voltage into a squarer/divider circuit (1/V
2
corrector) and providing the resulting signal to the multiplier which generates the current
reference for the inner current control loop.
reference for the inner current control loop.
In this way a change of the line voltage causes an inversely proportional change of the half-
sine amplitude at the output of the multiplier (if the line voltage doubles the amplitude of the
multiplier output is halved and vice versa) so that the current reference is adapted to the new
operating conditions with (ideally) no need for invoking the slow dynamics of the error
amplifier. Additionally, the loop gain is constant throughout the input voltage range, which
significantly improves dynamic behavior at low-line and simplifies loop design.
sine amplitude at the output of the multiplier (if the line voltage doubles the amplitude of the
multiplier output is halved and vice versa) so that the current reference is adapted to the new
operating conditions with (ideally) no need for invoking the slow dynamics of the error
amplifier. Additionally, the loop gain is constant throughout the input voltage range, which
significantly improves dynamic behavior at low-line and simplifies loop design.
In fact, with other PFC embedding the voltage feed-forward, deriving a voltage proportional
to the RMS line voltage implies a form of integration, which has its own time constant. If it is
too small the voltage generated is affected by a considerable amount of ripple at twice the
mains frequency which causes distortion of the current reference (resulting in high THD and
poor PF); if it is too large there is a considerable delay in setting the right amount of feed-
forward, resulting in excessive overshoot and undershoot of the pre-regulator's output
voltage in response to large line voltage changes. Clearly a trade-off was required.
to the RMS line voltage implies a form of integration, which has its own time constant. If it is
too small the voltage generated is affected by a considerable amount of ripple at twice the
mains frequency which causes distortion of the current reference (resulting in high THD and
poor PF); if it is too large there is a considerable delay in setting the right amount of feed-
forward, resulting in excessive overshoot and undershoot of the pre-regulator's output
voltage in response to large line voltage changes. Clearly a trade-off was required.
The L6563S realizes an innovative voltage feed-forward which both surges and drops, with a
technique that overcomes the time constant trade-off issue whichever voltage change
occurs on the mains. A C
technique that overcomes the time constant trade-off issue whichever voltage change
occurs on the mains. A C
FF
(C12) capacitor and an R
FF
(R27 + R28) resistor, both
connected to the V
FF
pin (#5), complete an internal peak-holding circuit that provides a DC
voltage equal to the peak of the rectified sinewave applied on the MULT pin (#3). In this way,
in the case of sudden line voltage rise, C
in the case of sudden line voltage rise, C
FF
is rapidly charged through the low impedance of
the internal diode; in the case of line voltage drop, an internal “mains drop” detector enables
a low impedance switch which suddenly discharges C
a low impedance switch which suddenly discharges C
FF
, avoiding a long settling time before
reaching the new voltage level. Consequently, an acceptably low steady-state ripple and low
current distortion can be achieved without any considerable undershoot or overshoot on the
preregulator's output, as in systems with no feed-forward compensation.
current distortion can be achieved without any considerable undershoot or overshoot on the
preregulator's output, as in systems with no feed-forward compensation.
In
the behavior of the EVL6563S-250W demonstration board in the case of an
input voltage surge from 90 to 140 Vac is shown; in the image it is evident that the V
FF
function provides for the stability of the output voltage which is not affected by the input
voltage surge. In fact, thanks to the V
voltage surge. In fact, thanks to the V
FF
function, the compensation of the input voltage
variation is very fast and the output voltage remains stable at its nominal value. The
opposite is confirmed in
opposite is confirmed in
; the behavior of a PFC using the L6562A and delivering
the same output power is shown; in the case of a mains surge the controller cannot
compensate and output voltage stability is guaranteed only by the feedback loop.
Unfortunately, as previously mentioned, its bandwidth is narrow and therefore the output
compensate and output voltage stability is guaranteed only by the feedback loop.
Unfortunately, as previously mentioned, its bandwidth is narrow and therefore the output