Intel E3845 FH8065301487715 Scheda Tecnica
Codici prodotto
FH8065301487715
Intel
®
Atom™ Processor E3800 Product Family
4382
Datasheet
31.5.1
BFPREG (BIOS_Flash_Primary_Region_bios)—Offset 0h
BIOS flash primary region addresses
Access Method
Default: 00001FFFh
9Ch
4
00000000h
A4h
4
00000000h
B0h
4
00000000h
B4h
4
00000000h
C0h
4
00000000h
C4h
4
00000000h
C8h
4
00000000h
D0h
4
00000000h
F8h
4
00000080h
FCh
4
00000020h
100h
4
00000510h
Table 303.
Summary of PCU SPI for Firmware Memory Mapped I/O Registers—
SPI_BASE_ADDRESS (Continued)
Offset
Size
Register ID—Description
Default
Value
Type:
Memory Mapped I/O Register
(Size: 32 bits)
BIOS_Flash_Primary_Region_bios:
SPI_BASE_ADDRESS Type:
PCI Configuration Register (Size: 32
bits)
SPI_BASE_ADDRESS Reference:
SPI_BASE_ADDRESS Reference:
[B:0, D:31, F:0] + 54h
31
28
24
20
16
12
8
4
0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1
RSVD0
PRL
RSVD1
PRB
Bit
Range
Default &
Access
Description
31:29
0b
RO
RSVD0:
Reserved
28:16
0000h
RO
BIOS Flash Primary Region Limit (PRL):
This specifies address bits 24:12 for the
Primary Region Limit. The value in this register loaded from the contents in the Flash
Descriptor.FLREG1.Region Limit
15:13
0b
RO
RSVD1:
Reserved
12:0
1FFFh
RO
BIOS Flash Primary Region Base (PRB):
This specifies address bits 24:12 for the
Primary Region Base The value in this register iloaded from the contents in the Flash
Descriptor.FLREG1.Region Base