Intel E3845 FH8065301487715 Scheda Tecnica

 

Intel

®

 Atom™ Processor E3800 Product Family

Datasheet

5

13.5 Transaction Router C-Unit Message Registers ...................................................... 345
13.6 Transaction Router P-Unit Message Registers ...................................................... 351

Graphics, Video and Display .................................................................................. 405
14.1 Features ........................................................................................................ 405
14.2 SoC Graphics Display ....................................................................................... 406
14.3 Display Pipes .................................................................................................. 407
14.4 Display Physical Interfaces ............................................................................... 407
14.5 References ..................................................................................................... 413
14.6 3D Graphics and Video..................................................................................... 413
14.7 Features ........................................................................................................ 414
14.8 VED (Video Encode/Decode) ............................................................................. 416
14.9 PCI Configuration Registers .............................................................................. 419
14.10 Memory Mapped Registers (1 of 2) .................................................................... 445
14.11 Memory Mapped Registers (2 of 2) .................................................................... 635
14.12 Memory Mapped Registers (Read Only) .............................................................1027
14.13 Memory Mapped Registers (Write Only).............................................................1033

MIPI-Camera Serial Interface (CSI) and ISP ........................................................1037
15.1 Signal Descriptions .........................................................................................1037
15.2 Features .......................................................................................................1039
15.3 Imaging Subsystem Integration .......................................................................1042
15.4 Functional Description.....................................................................................1044
15.5 MIPI-CSI-2 Receiver .......................................................................................1046
15.6 Register Map .................................................................................................1048
15.7 Image Signal Processor PCI Configuration Registers ............................................1050
15.8 Image Signal Processor Memory Mapped IO Registers .........................................1076

Storage Control Cluster (eMMC, SDIO, SD Card) ...................................................1744
16.1 Signal Descriptions .........................................................................................1744
16.2 Features .......................................................................................................1746
16.3 References ....................................................................................................1748
16.4 Register Map .................................................................................................1749
16.5 SDIO for Wifi PCI Configuration Registers ..........................................................1751
16.6 SDIO for Wifi Memory Mapped IO Registers .......................................................1763
16.7 SD Card PCI Configuration Registers .................................................................1807
16.8 SD Card Memory Mapped IO Registers ..............................................................1819
16.9 eMMC 4.5 PCI Configuration Registers...............................................................1863
16.10 eMMC 4.5 Memory Mapped IO Registers ............................................................1875

Serial ATA (SATA).................................................................................................1919
17.1 Signal Descriptions .........................................................................................1919
17.2 Features .......................................................................................................1920
17.3 References ....................................................................................................1922
17.4 Register Map .................................................................................................1923
17.5 SATA PCI Configuration Registers .....................................................................1924
17.6 SATA Legacy IO Registers ...............................................................................1953
17.7 SATA Index Pair IO Registers ...........................................................................1959
17.8 SATA AHCI Memory Mapped IO Registers ..........................................................1961
17.9 SATA Primary Read Command IO Registers .......................................................1998
17.10 SATA Primary Write Command IO Registers .......................................................2003
17.11 SATA Primary Read Control IO Registers ...........................................................2005
17.12 SATA Primary Write Control IO Registers ...........................................................2006
17.13 SATA Secondary Read Command IO Registers....................................................2007