Texas Instruments TMS320DM648 Manuale Utente
www.ti.com
a
a’
b
b’
c
c’
d
w
w’
x
x’
a
b
c
d
w
x
y
y
Cb’
a
= (-3Cb
cd
+ 33Cb
ab
+ 101Cb
ab
-3Cb
cd
)/128
Cr’
a
= (-3Cr
cd
+ 33Cr
ab
+ 101Cr
ab
-3Cr
cd
)/128
y’
ab
cd
z
Horizontal Image Size
Trailing edge
replicated chroma
samples
wx
yz
z
z’
yz
wx
ab
cd
Cb’
b
= (-3Cb
ab
+ 101Cb
ab
+ 33Cb
cd
-3Cb
ef
)/128
Cr’
b
= (-3Cr
ab
+ 101Cr
ab
+ 33Cr
cd
-3Cr
ef
)/128
Cb’
c
= (-3Cb
ab
+ 33Cb
ab
+ 101Cb
cd
-3Cb
ef
)/128
Cr’
c
= (-3Cr
ab
+ 33Cr
ab
+ 101Cr
cd
-3Cr
ef
)/128
Cb’
d
= (-3Cb
ab
+ 101Cb
cd
+ 33Cb
ef
-3Cb
gh
)/128
Cr’
d
= (-3Cr
ab
+ 101Cr
cd
+ 33Cr
ef
-3Cr
gh
)/128
Cb’
w
= (-3Cb
st
+ 33Cb
uv
+ 101Cb
wx
-3Cb
yz
)/128
Cr’
w
= (-3Cr
st
+ 33Cr
uv
+ 101Cr
wx
-3Cr
yz
)/128
Cb’
x
= (-3Cb
uv
+ 101Cb
wx
+ 33Cb
yz
-3Cb
yz
)/128
Cr’
x
= (-3Cr
uv
+ 101Cr
wx
+ 33Cr
yz
-3Cr
yz
)/128
Cb’
y
= (-3Cb
uv
+ 33Cb
wx
+ 101Cb
yz
-3Cb
yz
)/128
Cr’
y
= (-3Cr
uv
+ 33Cr
wx
+ 101Cr
yz
-3Cb
yz
)/128
Cb’
z
= (-3Cb
wx
+ 101Cb
yz
+ 33Cb
yz
-3Cb
wz
)/128
Cr’
z
= (-3Cr
wx
+ 101Cr
yz
+ 33Cr
yz
-3Cb
wx
)/128
Leading edge
replicated chroma
samples
4.5
Ancillary Data Display
4.5.1 Horizontal Ancillary (HANC) Data Display
4.5.2 Vertical Ancillary (VANC) Data Display
4.6
Raw Data Display Mode
Ancillary Data Display
Figure 4-20. Interspersed Chroma Edge Replication
The following sections discuss ancillary data display. No special provisions are made for the display of
horizontal ancillary (HANC) or vertical ancillary (VANC), also called vertical blanking interval (VBI), data.
horizontal ancillary (HANC) or vertical ancillary (VANC), also called vertical blanking interval (VBI), data.
HANC data can be displayed using the normal video display mechanism by programming IMGHSIZEn to
occur prior to the SAV code. The HANC data including the ancillary data header must be part of the
YCbCr separated data in the FIFOs. The VCTHRLD value and EDMA size must be programmed to
comprehend the additional samples. You must disable scaling and chroma re-sampling when including the
display of HANC data to prevent data corruption.
occur prior to the SAV code. The HANC data including the ancillary data header must be part of the
YCbCr separated data in the FIFOs. The VCTHRLD value and EDMA size must be programmed to
comprehend the additional samples. You must disable scaling and chroma re-sampling when including the
display of HANC data to prevent data corruption.
VANC (or VBI) data is commonly used for such features as teletext and closed-captioning. No special
provisions are made for the display of VBI data. VBI data may be displayed using the normal display
mechanism by programming IMGVOFF to occur before the first line of active video on the first line of
desired VBI data. Note that the VBI data must be YCbCr separated. You must disable scaling and chroma
re-sampling when the display of VBI data is desired or the data will be corrupted by the filters.
provisions are made for the display of VBI data. VBI data may be displayed using the normal display
mechanism by programming IMGVOFF to occur before the first line of active video on the first line of
desired VBI data. Note that the VBI data must be YCbCr separated. You must disable scaling and chroma
re-sampling when the display of VBI data is desired or the data will be corrupted by the filters.
The raw data display modes are intended to output data to a RAMDAC or other D/A-type device. This is
typically RGB formatted data. No timing information is inserted into the output data stream; instead,
selectable control signals are output to indicate timing. Raw data display includes a synchronized dual
channel option. This allows channel B to output a separate data stream using the same clock and control
as channel A. This mode is useful when used with a second video port in systems that require 24-bit RGB
output.
typically RGB formatted data. No timing information is inserted into the output data stream; instead,
selectable control signals are output to indicate timing. Raw data display includes a synchronized dual
channel option. This allows channel B to output a separate data stream using the same clock and control
as channel A. This mode is useful when used with a second video port in systems that require 24-bit RGB
output.
The raw data mode uses a single FIFO of 5120 bytes for storage of output data. The FIFO is filled by
EDMAs writing to the Y FIFO destination register A (YDSTA). EDMAs are requested using the YEVTA
event. In raw sync mode (RSYNC bit is set), the FIFO is split into 2560-byte channel A and B buffers. The
channel B FIFO is filled by EDMAs using the Y FIFO destination register B (YDSTB) as a destination.
Both YEVTA and YEVTB events are generated using the channel A timing control.
EDMAs writing to the Y FIFO destination register A (YDSTA). EDMAs are requested using the YEVTA
event. In raw sync mode (RSYNC bit is set), the FIFO is split into 2560-byte channel A and B buffers. The
channel B FIFO is filled by EDMAs using the Y FIFO destination register B (YDSTB) as a destination.
Both YEVTA and YEVTB events are generated using the channel A timing control.
106
Video Display Port
SPRUEM1 – May 2007