Manuali utente per Intel N455

Sommario

• Intel® Atom™ Processor N400 Series

  1
• Revision History

  7
• 1 Introduction

  8
  • 1.1 Processor Features

    8
  • 1.2 Interfaces

    9
    • 1.2.1 System Memory Support

      9
    • 1.2.2 Direct Media Interface Features

      9
    • 1.2.3 Integrated Graphics Controller

      10
  • 1.3 Clocking

    10
  • 1.4 Power Management Support

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  • 1.5 Package

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  • 1.6 Terminology

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  • 1.7 References

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  • 1.8 System Block Diagram

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• 2 Signal Description

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  • 2.1 Processor Legacy Signals

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  • 2.2 System Memory Interface

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  • 2.3 Reset and Miscellaneous Signals

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  • 2.4 DMI - Direct Media Interface

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  • 2.5 PLL Signals

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  • 2.6 Analog Display Signals

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  • 2.7 LVDS Signals

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  • 2.8 TAP Signals

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  • 2.9 Error and Thermal Protection

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  • 2.10 Processor Core Power Signals

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  • 2.11 Graphics, DMI and Memory Core Power Signals

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  • 2.12 Ground

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• 3 Functional Description

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  • 3.1 Integrated Memory Controller

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    • 3.1.1 System Memory Organization Modes

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    • 3.1.2 System Memory Technology Supported

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    • 3.1.3 Rules for populating SO-DIMM slots

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    • 3.1.4 Intel® Fast Memory Access (Intel® FMA) Technology Enhancements

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    • 3.1.5 DRAM Clock Generation

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  • 3.2 Integrated Graphics Controller

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    • 3.2.1 3D Graphics Pipeline

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    • 3.2.2 Video Engine

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    • 3.2.3 2D Engine

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    • 3.2.4 Display Pipes

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    • 3.2.5 Display Ports

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    • 3.2.6 VESA/VGA Mode

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    • 3.2.7 Multiple Display Configurations

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  • 3.3 Thermal Sensor

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    • 3.3.1 PCI Device 0, Function 0

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  • 3.4 Power Management

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  • 3.5 Intel® Hyper-Threading Technology

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• 4 Electrical Specifications

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  • 4.1 Power and Ground Balls

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  • 4.2 Decoupling Guidelines

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    • 4.2.1 Voltage Rail Decoupling

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  • 4.3 Processor Clocking

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    • 4.3.1 PLL Power Supply

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  • 4.4 Voltage Identification (VID)

    38
  • 4.5 Catastrophic Thermal Protection

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  • 4.6 Reserved or Unused Signals

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  • 4.7 Signal Groups

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  • 4.8 Test Access Port (TAP) Connection

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  • 4.9 Absolute Maximum and Minimum Ratings

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  • 4.10 DC Specifications

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    • 4.10.1 Voltage and Current Specifications

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    • 4.10.2 Interface DC Specifications

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• 5 Power Management

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  • 5.1 ACPI States Supported

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    • 5.1.1 System States

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    • 5.1.2 Processor Idle States

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    • 5.1.3 Integrated Graphics Display States

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    • 5.1.4 Integrated Memory Controller States

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    • 5.1.5 DMI States

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    • 5.1.6 Interface State Combinations

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  • 5.2 Processor Core Power Management

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    • 5.2.1 Enhanced Intel® SpeedStep Technology

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    • 5.2.2 Dynamic Cache Sizing

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    • 5.2.3 Low-Power Idle States

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    • 5.2.4 Thread C-states Description

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    • 5.2.5 Processor Core/Package C-states Description

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  • 5.3 External Thermal Sensor PM_EXTTS1#: Implementation for Fast C4/C4E Exit

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• 6 Thermal Specifications and Design Considerations

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  • 6.1 Thermal Specifications

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    • 6.1.1 Thermal Diode

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    • 6.1.2 Intel® Thermal Monitor

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    • 6.1.3 Digital Thermal Sensor

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    • 6.1.4 Out of Specification Detection

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    • 6.1.5 PROCHOT# Signal Pin

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• 7 Package Mechanical Specifications and Ball Information

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  • 7.1 Package Mechanical Specifications

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    • 7.1.1 Package Mechanical Drawings

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    • 7.1.2 Package Loading Specifications

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  • 7.2 Processor Ballout Assignment

    73