Scheda Tecnica (CDCLVD2102EVM)SommarioLow-Additive Jitter, Four LVDS Outputs Clock Buffer Evaluation Board11 Features12 General Description13 Signal Path and Control Circuitry24 Getting Started25 Device Selection26 Power Supply Connection27 Input Clock Selection27.1 Configuring Single-Ended Input28 Output Clock29 The EVM Board Schematic310 Bill of Materials5Important Notices6Dimensioni: 211 KBPagine: 7Language: EnglishApri il manuale
