Hitachi H8/3692 ユーザーズマニュアル

Rev. 1.0, 07/01, page 259 of 372

The A/D converter operates by successive approximation with 10-bit resolution.  It has two
operating modes; single mode and scan mode. When changing the operating mode or analog input
channel, in order to prevent incorrect operation, first clear the bit ADST in ADCSR to 0. The
ADST bit can be set at the same time as the operating mode or analog input channel is changed.

In single mode, A/D conversion is performed once for the analog input of the specified single
channel as follows:

1. A/D conversion is started when the ADST bit in ADCSR is set to 1, according to software or

external trigger input.

2. When A/D conversion is completed, the result is transferred to the corresponding A/D data

register of the channel.

3. On completion of conversion, the ADF bit in ADCSR is set to 1. If the ADIE bit is set to 1 at

this time, an ADI interrupt request is generated.

4. The ADST bit remains set to 1 during A/D conversion. When A/D converion ends, the ADST

bit is automatically cleared to 0 and the A/D converter enters the wait state.

In scan mode, A/D conversion is performed sequentially for the analog input of the specified
channels (four channels maximum) as follows:

1. When the ADST bit in ADCSR is set to 1 by software or external trigger input, A/D

conversion starts on the first channel in the group (AN0 when CH2 = 0, AN4 when CH2 = 1).

2. When A/D conversion for each channel is completed, the result is sequentially transferred to

the A/D data register corresponding to each channel.

3. When conversion of all the selected channels is completed, the ADF flag in ADCSR is set to 1.

If the ADIE bit is set to 1 at this time, an ADI interrupt requested is generated.  A/D
conversion starts again on the first channel in the group.

4. Steps [2] and [3] are repeated as long as the ADST bit remains set to 1. When the ADST bit is

cleared to 0, A/D conversion stops and enters the wait state.