Hitachi H8/3692 ユーザーズマニュアル
Rev. 1.0, 07/01, Page
ix
of
xxiv
6.4
Direct Transition ............................................................................................................... 78
6.4.1
6.4.1
Direct transition from the active mode to the subactive mode............................. 78
6.4.2
Direct transition from the subactive mode to the active mode............................. 79
6.5
Module Standby Function ................................................................................................. 79
Section 7 ROM ................................................................................................. 81
7.1
Block Configuration.......................................................................................................... 81
7.2
Register Descriptions ........................................................................................................ 82
7.2.1
7.2.1
Flash Memory Control Register 1 (FLMCR1)..................................................... 83
7.2.2
Flash Memory Control Register 2 (FLMCR2)..................................................... 84
7.2.3
Erase Block Register 1 (EBR1)............................................................................ 84
7.2.4
Flash Memory Power Control Register(FLPWCR) ............................................. 85
7.2.5
Flash Memory Enable Register(FENR) ............................................................... 85
7.3
On-Board Programming Modes ........................................................................................ 86
7.3.1
7.3.1
Boot Mode ........................................................................................................... 86
7.3.2
Programming/Erasing in User Program Mode..................................................... 89
7.4
Flash Memory Programming/Erasing ............................................................................... 90
7.4.1
7.4.1
Program/Program-Verify ..................................................................................... 90
7.4.2
Erase/Erase-Verify ............................................................................................... 92
7.4.3
Interrupt Handling when Programming/Erasing Flash Memory.......................... 93
7.5
Program/Erase Protection ................................................................................................. 95
7.5.1
7.5.1
Hardware Protection ............................................................................................ 95
7.5.2
Software Protection.............................................................................................. 95
7.5.3
Error Protection.................................................................................................... 95
7.6
Programmer Mode ............................................................................................................ 96
7.6.1
7.6.1
Socket Adapter..................................................................................................... 96
7.6.2
Programmer Mode Commands ............................................................................ 96
7.6.3
Memory Read Mode ............................................................................................ 98
7.6.4
Auto-Program Mode ............................................................................................ 100
7.6.5
Auto-Erase Mode ................................................................................................. 102
7.6.6
Status Read Mode ................................................................................................ 104
7.6.7
Status Polling ....................................................................................................... 105
7.6.8
Programmer Mode Transition Time..................................................................... 106
7.6.9
Notes on Memory Programming.......................................................................... 106
7.7
Power-Down States for Flash Memory ............................................................................. 107
Section 8 RAM ................................................................................................. 109
Section 9 I/O Ports ............................................................................................ 111
9.1
Port 1................................................................................................................................. 111
9.1.1
9.1.1
Port Mode Register 1(PMR1) .............................................................................. 112
9.1.2
Port Control Register 1(PCR1) ............................................................................ 113
9.1.3
Port Data Register 1(PDR1)................................................................................. 113